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ASIC Design Services and XJTAG bosses talk boundary scan

9 October 2013 News

ASIC Design Services recently played host to an overseas visitor from the UK’s XJTAG, with the two companies teaming up to present a series of workshops around South Africa on boundary scan technology.

Simon Payne (left) and Tony Dal Maso.
Simon Payne (left) and Tony Dal Maso.

After the dust had settled, the companies’ respective CEOs – Tony Dal Maso and Simon Payne – took time out to sit down and discuss their collaboration, boundary scan technology, and the difference between South African and English winters.

First off, some background on how XJTAG got started and why: Payne is one of the founders of the Cambridge Technology Group which was incepted in 1992 to do consultancy work, real-time embedded systems, software and hardware for a number of clients. While working on a project for the AT&T Research Labs in Cambridge, the consultancy was faced with the challenge of the introduction of ball grid array (BGA) devices into electronic designs.

“There’s always an increasing pressure to create boards which are smaller, so they are more densely populated,” explains Payne. “This means you’ve got fewer test points, so testing becomes a real challenge, as does debugging. Particularly so when you’ve got BGA devices, where all the connections are underneath the chip rather than around the edge.

“Because BGAs were new, the contract manufacturers were also grappling with placing them correctly and they were having all sorts of problems. So we were fighting two battles, one was determining whether the design worked, and the other was whether the contract manufacture had done their job properly.”

Faced with an over-reliance on functional testing, which requires that a lot of the board be up and running, the design team started looking around for tools that could be used at the design stage to resolve these problems. “What we found was that there was this standard called JTAG, which had been around for quite a long time and was implemented into the BGA, so we had access to it.

“We discovered that tools were available, but they were designed for manufacture and that really didn’t work for us,” Payne continues. “The approach for manufacture seemed to be very board centric, whereas we wanted something that allowed us to actually change the design and just put in a new netlist. We wanted to be able to have libraries for devices such as RAM, Flash and Ethernet controllers, so we could reuse any new tests that we developed.

“So we came up with a tool that actually did all of that. It was successfully used with our clients and then other clients and then other contract manufacturers. And eventually we decided to launch it as a separate company in its own right because so many people liked it.”

According to Payne, one of the key benefits of the XJTAG system lies in the fact that it can be used very early in the design phase, as opposed to the conventional wisdom that sees test as something that is purely for manufacture or just before manufacture. It allows a design engineer to begin analysing the design-for-test coverage on the board immediately after they have produced their schematic design.

“XJTAG can check whether there are connections between JTAG and non-JTAG devices,” says Payne. “If there is more than one JTAG device in a chain, they have to be connected correctly and it’s very easy to make a mistake such as getting the TDI and TDO lines the wrong way around between devices. Engineers can detect those types of errors so that they can be corrected before any hardware is produced, which can potentially save a complete board spin.

“So we were hugely excited that this whole approach would change the dynamics of the way the industry thought. We’d challenged the status quo in many ways and the perception of what JTAG can achieve. With XJTAG we have created a product that can be used by everyone in the product lifecycle, from early in the design stage right through to manufacture.”

The XJTAG workshops were well attended.
The XJTAG workshops were well attended.

Which brings us to the reason for Payne’s South African tour: the workshops (although I suspect a side trip to 'scan the boundaries' of the Kruger National Park may have been a strong motivating factor), which were intended to educate the marketplace about the benefits they can reap through boundary scan and XJTAG’s solution specifically.

A match made in design heaven

Having entered into a distribution agreement with XJTAG four years ago, Dal Maso believes that there is a powerful synergy with ASIC Design Services’ other product and service offerings: “First and foremost we’re in the FPGA business and FPGAs tend to come out with BGA packages,” he explains. “The trend is towards systems-on-chip which means lots more pins which means BGAs. We understand from the clients we serve that it’s very important that these scan chains be designed in at the layout stage because if you don’t do that then you compromise your testability.

“As a provider of design and consulting services, our philosophy is to actually use the products that we sell because in that way we get to understand our products and we’re better able to help our customers with those products. “

One of the ways in which the duo are helping customers is by providing a hands-on evaluation service whereby they will get a board up and running with XJTAG, allowing the customer to test drive the system for a thirty day period to evaluate its benefits for themselves.

Why engineering teams are choosing XJTAG

The long list of companies that have adopted XJTAG encompasses global leaders in a multitude of industries. South African adopters include the likes of Denel, Saab and Reutech Communications. In an acknowledgement of the esteem in which these companies hold the solution, many of them have provided testimonials for case studies which XJTAG produces as part of its marketing message (in fact, a series of these is currently being run in Dataweek).

The factors that are frequently identified as being decisive for those adopting XJTAG include the ability to integrate it into product development as early as the design stage; the fact that it provides the ability to easily distinguish between design and manufacturing flaws; the ability to reuse IP across projects; and its ability to boost programming speed through a technique that harnesses an FPGA or processor on the target board to program the memory on a device.

“This proved to be vital to one of my clients who immediately saw the benefit of going with this technology,” explains Dal Maso. “Not just from a testability point of view, but because they were able to reduce the programming times of their board dramatically. That was the main requirement; they needed to build so many boards within a certain period of time and deliver them by deadline, so they chose the technology for that reason.”

XJTAG employs an unconventional licensing structure, where instead of using a software licence, it instead resides on a physical module that provides a high-speed interface to the JTAG chain on a circuit board, with user interface options such as USB. This means that the licence is entirely portable and not stuck on one machine. Network licensing options are also available for global operations that need to share licences between different organisations in different locations.

Closing comments

Asked what he would take away from his first trip to South Africa, Payne had this to say: “Apart from the wonderful weather, which has been better in winter than an English summer, I think the design engineers here are very open to new ideas and adopting them much faster than I’ve seen elsewhere.

“So many companies are trying to compete on an international basis these days that you have to think globally when you’re developing products. Those who can react quicker, who adopt and take a lead in things that are going to save them time and money, are going to win. And that’s what I’m seeing in South Africa. I’m seeing some great companies that are thinking ahead and responding quickly to new opportunities.

“The response we’ve had to the workshops here has been much keener than I’ve seen in other countries, and I think that’s a testament to the vision that engineers have here. And what they’re saying to me is, they love this as a tool and they are going to be adopting it throughout their product portfolios. So we’re really looking forward to working with them.”

Dal Maso concurs that the workshops were a resounding success. “One of the objectives of the workshops was to try to help the engineers themselves by sharing the concept with those at the management level. Oftentimes, the engineer stuck with a problem sees the benefits of something, he gets it, but he needs the decision makers to also understand where it fits in. We definitely met our objective in terms of bringing this message across to the industry,” he concludes.

Boundary scan in a nutshell

The boundary scan test architecture provides a means to test interconnects between integrated circuits on a board without using physical test probes. This involves the addition of a boundary scan cell that includes a multiplexer and latches to each pin on the device.

Each test cell can capture data from pin or core logic signals and can be programmed to drive a signal onto a pin and thus across an individual trace on the board. At the same time as forced test data is serially shifted into the boundary scan cells, captured data is serially shifted out and externally compared to the expected results. The resulting distributed shift register is called the JTAG scan chain.

The cell at the destination of the board trace can then be read, verifying that the trace properly connects the two pins. If the trace is shorted to another signal or if the trace is open, the correct signal value does not show up at the destination pin, indicating a fault.

Boundary scan technology thus offers benefits such as shorter test times, higher test coverage, increased diagnostic capability and lower capital equipment cost.



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