Trends in SMT manufacture and high speed digital circuit board design

19 May 2004 News

The internationally well-known Robert (Bob) Hanson was recently in South Africa to present two seminars covering SMT manufacturing and test as well as high-frequency digital design. While I thought that these two topics were poles apart, Hanson pointed out that although trained as a digital design engineer, the design itself often affected the manufacture and performance of the products.

Hanson was employed by Boeing for many years, not only in his core design role, but also to sort out problems at its Dallas electronic assembly facility, and hence his extensive knowledge in both fields.

Robert (Bob) Hanson
Robert (Bob) Hanson

Hanson, who has a Master of Science Degree in Electronic Engineering, worked for some of the world's leading corporations including Boeing (where he was involved in PCB design for commercial aircraft such as the 747 and the B1-B bomber), Rockwell, Loral and Honeywell as a design engineer. During his latter years at Boeing, he became very involved in, and was fascinated with training. As a result, he took early retirement from Boeing in 1991 to create Americom Seminars, of which he is president. Today he teaches and consults for more than 100 companies worldwide including his former employers and other renowned companies such as Intel, IBM, HP and Lucent.

Delegates at one of the seminars
Delegates at one of the seminars

Hanson came to South Africa this time (his third visit) at the request of Nechan Naicker of EDA Technologies, South Africa's premier high-speed PCB design bureau, and I had the opportunity to probe him on some of the technology trends prior to the seminars, which had very good participation from local industry. Those that were not present at this year's seminar series arranged by EDA Technologies should note that Hanson is also prepared to carry out on-site consultation and training for individual companies and it is perhaps unfortunate that he has not had more exposure to the local electronics industry. Interested persons can contact Naicker for more information.

Nechan Naicker of EDA Technologies (left) with Robert Hanson of Americom Seminars
Nechan Naicker of EDA Technologies (left) with Robert Hanson of Americom Seminars

The topics discussed are covered here only briefly, as space allows only a shallow insight into the knowledge and expertise of Bob Hanson.

Lead-free soldering

This was a topic that was recently covered by Dataweek, with most respondents indicating that they were ready for the EU's July 2006 deadline, although there was currently no local demand for lead-free products. Hanson's perspective here is interesting as he has consulted on the topic for NASA and some major defence companies who do not intend following the lead-free route since the reliability of the alternative technologies has not been proven. On the other hand, Motorola - although 'communications' is exempt from the regulations in the first round - has built cellphones using lead-free technology and has not yet experienced problems.

While not able to comment on claims from Japanese companies that they have mastered the technology, Hanson believes that a host of difficulties with lead-free could result in massive lobbying by European companies for relaxation of the 2006 deadline. He believes that the elevated temperatures used in the process will lead to problems with ICs, while the more corrosive fluxes will indubitably result in higher maintenance requirements for the process line. More significantly, the process itself may be much more difficult to control than conventional technology, and ionic contamination will result in the need for much more aggressive cleaning of PCBs which could result in degradation of performance. The jury is still out as far as Hanson is concerned, although the local industry should be happy with the fact that automotive, defence and communication electronics are exempt initially. This should avoid problems for our large defence electronics industry as well as the large commercial manufacturers and exporters, including Shurlok and UEC.

EMI compliance

Again, a requirement initiated by the EU but quickly followed up by the FCC. The depth of the problem was illustrated by Hanson in that while medical products are officially exempt, there is no market for systems that are not EU- and FCC-compliant. Another sector that has a waiver is the automotive industry, but here again, with the increasing amount of electronics going into cars and the higher frequencies being used over the CAN Bus, there is no doubt that there will eventually be a requirement to at least shield automotive cables.

As for high-speed digital designs, there is a major challenge now to deal with both radiated emissions and susceptibility to EMI. Switched mode power supplies in particular are, to an increasing degree, causing conductive emissions on power lines and higher-mode harmonics being generated are creating radiated emissions. Even the structure of the chassis is now a concern with normal apertures causing leakage of high-speed signals. This requires more focus on the design of gaskets, metallic overlap and chassis grounding techniques.

Semiconductor trends

The new types of silicon structures for high-speed designs are focusing on the use of gallium arsenide, silicon germanium and indium phosphate. Major concerns are a low dielectric constant (DK), and copper interconnects are being used in place of the traditional aluminium. Low DK is required to minimise losses while copper will cut power loss on interconnects (and heating) by about 40%. Both of these technologies are proving very hard for industry to implement. As an example, one can have 2 km of interconnect in a 30 x 30 mm package which will account for more than 50% of power loss with associated undesirable chip heating. The etching process used for aluminium does not work with copper and the latter has the tendency to migrate atoms into silicon junctions resulting in contamination. The challenge is also to get an interconnect size of 90 nm which requires use of silk dielectric or air injection technology. Whether any company has really mastered these technologies is questionable. In terms of wafer size many companies have mastered 300 mm diameter technology and the challenge today is to move ahead to the 400 mm diameter wafer.

Advanced PCB design methodologies

Interlayer capacitance for high speed bypassing is now being built at 0,1 milli-inches with the dielectric constant in the thousands (1 mil is a thousandth of an inch or 0,0254 mm). Thus one square inch of this core material can generate hundreds of nano Farads of capacitance. PCBs are now in production using blind and buried vias mainly as a result of BGA breakout requirements. The state-of-the-art for traces and spaces on interlayers is 2 x 2 milli-inches on half ounce copper interlays. For EMI requirements, application of the via-stitching and 20H rule are required in order to pass EU and FCC requirements. Note that the dimensions here were not converted to metric as they make more contextual sense in the imperial measure form.

Test instrumentation

With faster circuitry, test equipment has to be very precise and this has pushed the cost up significantly. Today a 7 GHz digital sampling scope with a sample rate in the high 20 GHz range will cost in the region of US$80 000. The high tech probes required for this can cost an additional US$17 000.

High-speed technology roadmap

One of the concerns at PCB level today is that rise times on ICs can be as low as 20 ps which can create problems with ground bounce, transmission line reflection, crosstalk, bypassing power and ground planes and increased EMI radiation. Regarding throughputs, chips and their boards are being designed with the OC192 standard in mind, namely 10 GB per second. This requires high precision of characteristic impedance, geometry of stack-ups and may require the use of new PCB materials rather than the standard FR4. The new Intel Pentium requires over 400 interfacing resistors and as a result there is increased use of buried resistance and capacitance. For transmission at high speeds over both cables and large motherboards, equalisation techniques are required in order to ensure that the received waveform is not distorted by jitter that could result in inoperability.


Many thanks to Bob Hanson for an insightful and interesting interview. Although in his late sixties, he has kept up to date with technology development through extensive reading, Internet browsing and his interaction with the companies he consults for. His deep knowledge of the topics he teaches should make many companies reconsider their retirement age of 60 when such experts as Bob Hanson are only reaching their peak and can contribute greatly to the development of young engineers.

As a result of increasing high-speed application demands on PCB designs, Nechan Naicker identified Robert Hanson in 2001 as one of the world's experts on the subject, and invited him to share his knowledge with South African electronics engineers and PCB designers. Thus far, through the various seminars arranged by EDA Technologies, 96 persons have benefited from his vast knowledge. EDA Technologies is a premier high-speed PCB design and manufacturing bureau, and has successfully designed numerous PCBs with the latest high-speed materials and proven methodologies.

For more information about PCBs and high speed design, contact Nechan Naicker of EDA Technologies, 012 653 3323, [email protected], and see


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