High-speed logic analysers

Test & Measurement

27 August 2003 Test & Measurement Retail (Industry)

Tektronix has released a next-generation logic analyser series that offers high timing resolution, deep memory timing and fast state acquisition. The basic building blocks for digital systems - programmable logic, microcontrollers, memory devices, etc, - have become increasingly more advanced, with data rates up to 400 Mbps and set-up/hold times down to 350 ps. As a result, digital designers and debug engineers are challenged with measuring digital signal timing on increasingly faster signals. Today's slowest signals often have extremely fast edges, creating a need for high-speed logic analysis when debugging and validating digital systems.

Tektronix says that its TLA5000 Series logic analysers feature 500 ps (2 GHz)/32 Mb deep memory timing simultaneous with 125 ps MagniVu acquisition, giving cost-conscious designers a superior test instrument for performing hardware timing analysis and ensuring proper operation and specification adherence of digital systems.

The TLA5000 Series features high timing resolution and powerful triggering capabilities to debug fast glitches and, it is claimed to be the only instrument in its class with the ability to capture narrow set-up/hold violations. The memory depth of the instruments enables designers to capture high-speed timing problems over long periods of time.

The TLA5000 Series includes four monolithic logic analysers - TLA5201, TLA5202, TLA5203, TLA5204 - ranging from 34 to 136 channels. All models provide 500 ps (2 GHz) deep memory timing on quarter channels, 1 ns deep memory timing on half channels, and 2 ns to 50 ms deep memory timing on all channels, simultaneously with 125 ps MagniVu acquisition. The instruments offer 235 MHz state acquisition and up to 32 Mb memory depth.

For more information contact Channels Measurement Services, 080 011 7850.

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