One of the most famous maxims in technology is, of course, Moore’s Law. For more than 55 years, the ‘Law’ has described and predicted the shrinkage of transistors, as denoted by a set of roughly biennial waypoints called technology nodes. An article published on IEEE Spectrum (https://spectrum.ieee.org/semiconductors/devices/a-better-way-to-measure-progress-in-semiconductors) explores the validity of Moore’s Law today. From the article:
“Like some physics-based doomsday clock, the node numbers have ticked down relentlessly over the decades as engineers managed to regularly double the number of transistors they could fit into the same patch of silicon. When Gordon Moore first pointed out the trend that carries his name, there was no such thing as a node, and only about 50 transistors could economically be integrated on an IC.
“But after decades of intense effort and hundreds of billions of dollars in investment, look how far we’ve come! If you’re fortunate enough to be reading this article on a high-end smartphone, the processor inside it was made using technology at what’s called the 7-nanometre node. That means that there are about 100 million transistors within a square millimetre of silicon. Processors fabricated at the 5-nm node are in production now, and industry leaders expect to be working on what might be called the 1-nm node inside of a decade.”
And then what?
“After all, 1 nm is scarcely the width of five silicon atoms. So you’d be excused for thinking that soon there will be no more Moore’s Law, that there will be no further jumps in processing power from semiconductor manufacturing advances, and that solid-state device engineering is a dead-end career path.
“You’d be wrong, though. The picture the semiconductor technology node system paints is false. Most of the critical features of a 7-nm transistor are actually considerably larger than 7 nm, and that disconnect between nomenclature and physical reality has been the case for about two decades. That’s no secret, of course, but it does have some really unfortunate consequences.
“One is that the continuing focus on ‘nodes’ obscures the fact that there are actually achievable ways semiconductor technology will continue to drive computing forward even after there is no more squeezing to be accomplished with CMOS transistor geometry. Another is that the continuing node-centric view of semiconductor progress fails to point the way forward in the industry-galvanising way that it used to. And, finally, it just rankles that so much stock is put into a number that is so fundamentally meaningless.
“Efforts to find a better way to mark the industry’s milestones are beginning to produce clearly better alternatives. But will experts in a notoriously competitive industry unite behind one of them? Let’s hope they do, so we can once again have an effective way of measuring advancement in one of the world’s largest, most important, and most dynamic industries.
“So, how did we get to a place where the progress of arguably the most important technology of the past hundred years appears, falsely, to have a natural endpoint? Since 1971, the year the Intel 4004 microprocessor was released, the linear dimensions of a MOS transistor have shrunk down by a factor of roughly 1000, and the number of transistors on a single chip has increased about 15 million-fold. The metrics used to gauge this phenomenal progress in integration density were primarily dimensions called the metal half-pitch and gate length. Conveniently, for a long time, they were just about the same number.
“Metal half-pitch is half the distance from the start of one metal interconnect to the start of the next on a chip. In the two-dimensional or ‘planar’ transistor design that dominated until this decade, gate length measured the space between the transistor’s source and drain electrodes. In that space sat the device’s gate stack, which controlled the flow of electrons between the source and drain. Historically, it was the most important dimension for determining transistor performance, because a shorter gate length suggested a faster-switching device.
“In the era when gate length and metal half-pitch were roughly equivalent, they came to represent the defining features of chip manufacturing technology, becoming the node number. These features on the chip were typically made 30 percent smaller with each generation. Such a reduction enables a doubling of transistor density, because reducing both the x and y dimensions of a rectangle by 30 percent means a halving in area.
“Using the gate length and half-pitch as the node number served its purpose all through the 1970s and ’80s, but in the mid-1990s, the two features began to uncouple. Seeking to continue historic gains in speed and device efficiency, chipmakers shrank the gate length more aggressively than other features of the device. For example, transistors made using the so-called 130-nm node actually had 70-nm gates. The result was the continuation of the Moore’s Law density-doubling pathway, but with a disproportionately shrinking gate length. Yet industry, for the most part, stuck to the cadence of the old node-naming convention.”
Read further in the expansive IEEE Spectrum article at https://spectrum.ieee.org/semiconductors/devices/a-better-way-to-measure-progress-in-semiconductors
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