Computer/Embedded Technology

Quartz RFSoC subsystems ideal for custom integrations

26 February 2021 Computer/Embedded Technology

Pentek has introduced new additions to the Quartz RFSoC architecture family: the Model 6350S and Model 6353S (Gen 3 RFSoC), eight-channel A/D and D/A converter subsystems in a rugged, small form factor package. Based on Pentek QuartzXM eXpress modules that utilise the Xilinx Zynq UltraScale+ RFSoC FPGA, the two new models are highly suitable for SIGINT and COMINT, military communications, EW (electronic warfare) countermeasures, radar transceivers, test and measurement, Satcom, LiDAR, 5G and LTE wireless applications.

Designed for platform integration

The Model 6350S and Model 6353S are complete self-contained RF converter and processing subsystems in a small mounting frame. Requiring only a single 12 V power supply, the subsystems can be integrated as a component in a larger system with minimal design effort.

All analog I/O and control and communication interfaces are easily accessible with industry standard connectors, simplifying connections to other system components. The bottom surface of the subsystem provides an efficient thermal interface enabling conduction cooling and allowing fanless operation in most installations.

Optimised for SWaP (size, weight and power), both subsystems are very small in size, measuring 3,8 (H) x 11,68 (W) x 17,02 (D) cm and weighing just under 850,5 grams. Intended for use in customer provided enclosures, the subsystems are ideal for deployment in challenging and harsh environments.

The Quartz architecture difference

The Pentek Quartz architecture embodies a streamlined approach to FPGA products, simplifying the design for reduced power and cost, while still providing some of the highest-performance FPGA resources available today. Supported by Pentek’s Navigator Design Suite tools, Quartz products offer users an efficient path for developing and deploying software and FPGA IP for data and signal processing.

The Xilinx Zynq UltraScale+ RFSoC processor integrates eight RF-class A/D and D/A converters into the Zynq FPGA fabric along with quad ARM Cortex-A53 and dual ARM Cortex-R5 processors, creating a multichannel data conversion and processing solution on a single chip.

Data conversion

The front end of the Model 6350S (Gen 1 RFSoC) accepts analog IF or RF inputs up to 4 GHz on eight coax connectors with transformer-coupling to eight 4 GSps, 12-bit A/D converters, delivering either real or complex DDC samples. Additional IP-based decimation filters provide overall DDC decimation from 2 to 128.

Eight D/A converters accept baseband real or complex data streams from the FPGA’s programmable logic. Each 6,4 GSps, 14-bit D/A includes a digital up-converter with independent tuning and interpolations of 1x, 2x, 4x and 8x. All A/Ds and D/As are transformer-coupled to wideband coax cable connectors.

The Model 6353S (Gen 3 RFSoC) boosts the input signal bandwidth to 6 GHz using a 5 GSps, 14-bit A/D with additional decimation settings. The D/A rate increases from 6,4 to 10 GSps.

Fast data interface

The Model 6350S and Model 6353S support eight 28 Gbps full duplex lanes using RFSoC GTY gigabit serial ports. With the built-in 100 GigE UDP interface or installation of a user-provided serial protocol, this interface delivers a high-speed gigabit data streaming path between the Model 6350S or Model 6353S and other identical subsystems, optical transceivers, data storage or other processing systems.

Factory installed IP speeds development

The Model 635xS subsystems are pre-loaded with a suite of Pentek IP modules to provide data capture, timing, interface and processing solutions for many common applications. Modules include DMA engines, DDR4 memory controllers, test signal and metadata generators, data packing and flow control.

Navigator Design Suite for streamlined IP development

Pentek’s Navigator Design Suite includes Navigator FDK (FPGA design kit) for custom IP, and Navigator BSP (board support package) for creating host software applications.

The Navigator FDK includes the board’s entire FPGA design as a block diagram that can be graphically edited in Xilinx’s Vivado tool suite, with full source code and documentation. Developers can integrate their IP along with the factory-installed functions or use the Navigator kit to replace the IP with their own. The Navigator FDK library is fully AXI-4 compliant, providing a well-defined interface for developing custom IP or integrating IP from other sources.

The Navigator BSP supports Xilinx’s PetaLinux on the ARM processors. Users can work efficiently using high-level API functions, or gain full access to the underlying libraries including source code. Pentek provides numerous examples to assist in the development of new applications.


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