The AD9625-2.5 was débuted by Analog Devices, an analog-to-digital converter (ADC) with 150 dBFS/Hz noise floor and 80 dBc SFDR out to Nyquist. This level of performance means designers can discern by very small signals in the presence of noise, clutter, blockers and interferers. The chip can be used for advanced new designs in communications, instrumentation and military/aerospace applications.
Designed for sampling wide bandwidth analog signals, the device can be used up to its third Nyquist zone. Its wide input bandwidth enables advanced RF sampling architectures that reduce the number of analog frequency down-conversion stages and their associated noise and cost contributions. The simplified system architecture eliminates the need to interleave multiple A/D converters to obtain needed performance and allows for the development of reconfigurable platforms.
The AD9625-2.5 simplifies the digital interfacing challenge by integrating two digital down-converters (DDC), two numerically controlled oscillators (NCO) and a configurable JESD204B serial link for the output data. These industry firsts improve usability and functionality by reducing output data rate requirements and simplifying board-level design and layout.
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