Programmable Logic


Stratix 10 FPGAs and SoCs

25 November 2015 Programmable Logic

Altera lifted the veil on Stratix 10 FPGAs and SoCs, its next generation of high-end programmable logic devices. Leveraging the company’s HyperFlex fabric architecture built on the Intel 14 nm Tri-Gate process, it provides two times higher core performance over previous generation FPGAs.

Combining what it claims as the industry’s highest performance, highest density FPGA with advanced embedded processing capabilities, GPU-class floating point computation performance and heterogeneous 3D SiP integration, Altera empowers its customers to address design challenges in the next generation of communications, data centre, IoT infrastructure, military and high-performance computing systems.

HyperFlex introduces registers throughout all core interconnect routing segments, enabling Stratix 10 FPGAs and SoCs to benefit from proven performance-enhancing design techniques such as register retiming, pipelining and other design optimisation techniques which are not practical in conventional FPGA architectures. The HyperFlex architecture allows designers to eliminate critical paths and routing delays, and rapidly close timing on their designs.

All members of the Stratix 10 family leverage heterogeneous 3D SiP integration to combine a high-density monolithic FPGA core fabric (up to 5,5M logic elements) with other advanced components, thereby increasing their scalability and flexibility. A monolithic core fabric maximises device utilisation and performance by avoiding the connectivity issues of competing homogeneous devices that use multiple FPGA dice to deliver higher densities.

Initial devices in the lineup use Intel’s proprietary EMIB (Embedded Multi-die Interconnect Bridge) technology to integrate high-speed serial transceiver and protocol tiles with monolithic core logic. All densities in the family will be available with an integrated 64-bit ARM quad-core Cortex-A53 hard processor system (HPS) with a rich feature set of peripherals, including a system memory management unit, external memory controllers and high-speed communication interfaces.

At the core of Stratix 10’s security capabilities is an innovative Secure Design Manager (SDM), which delivers sector-based authentication and encryption, multi-factor authentication and physically unclonable function (PUF) technology. This level of security makes it an ideal solution for use in military, cloud security and IoT infrastructure, where multi-layered security and partitioned IP protection are paramount.

For more information contact EBV Electrolink, +27 (0)21 402 1940, capetown@ebv.com, www.ebv.com



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