Intel and Analog Devices (ADI) have introduced a new architecture that incorporates digital signal processor (DSP) and microcontroller features in a single platform. The companies claim that the integrated 'Micro Signal Architecture' enables vast improvements in ease of programmability, performance and power consumption and is optimised for processing modem, audio, video, image and voice signals in battery-powered communications applications.
The announcement by ADI and Intel executives at a New York City press conference in December marks the successful completion of the companies' joint development agreement which began in February 1999.
"In record time, the data processing leadership of Intel and the signal processing leadership of ADI have created the world's easiest-to-program DSP architecture," said Ron Smith, Vice President and General Manager of Intel's Wireless Communications and Computing Group. "The new Micro Signal Architecture will play a vital role in the Intel Personal Internet Client Architecture, as we work to speed the development of applications and hardware for next-generation wireless Internet access devices."
"Working with Intel to develop this high-performance DSP architecture with Dynamic Power Management presents Analog Devices with a world-class, power-efficient platform within our 16 bit DSP strategy," said Jerry Fishman, President and CEO of Analog Devices. "The DSP core will naturally proliferate throughout ADI's general-purpose DSP portfolio. We will also use the core in chipset solutions that integrate our high-performance analog, DSP and radio frequency technology."
Key architectural features
The two companies also announced availability of an advanced software program compiler designed to speed time-to-market. The compiler allows programmers to write signal processing and control code in the C/C++ languages, the most commonly used programming language in commercial and academic circles. Profiling tools automatically identify intense signal processing 'hot spots' requiring further optimisation by the programmer. Typically this results in over 80% of the C/C++ code still remaining in the final code, preserving thousands of staff months in development time and reducing overall time-to-market.
This is the first DSP architecture to incorporate Dynamic Power Management capabilities, which deliver dramatic improvement in battery life. Dynamic Power Management supports continuous monitoring of the software running on the architecture and enables dynamic adjustments of both the voltage delivered to the core and the frequency at which the core is running (MHz) to optimise the power delivered for the task.
The architecture has been further optimised to process the bit stream for rich multimedia running on battery-powered equipment. Portable devices with video links, downloadable images, handwriting and speech recognition and text-to-speech are made possible through tuned instructions that provide up to ten times the performance of other DSPs.
Product availability
Intel and Analog Devices are currently working with leading tools providers, designers and software vendors to create tools, realtime operating systems and algorithms to support the new core. Developers can access specifications and development tools for the new core architecture through the Joint Development Website, www.dspjointdevelopment.com. Silicon of the core will be released to Analog Devices and Intel development partners in early this year. Products based on the core from Analog Devices and Intel will be developed and marketed separately. All products from both companies will be compatible at the assembly source and binary code levels. The companies expect these products to be available over the next 12 months.
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