Programmable Logic


Communications designers can benefit from new IP solutions

4 June 2003 Programmable Logic Infrastructure

Actel has added three intellectual property (IP) building blocks that have been optimised for use with the company's reprogrammable, flash-based ProASICPLUS and high-speed, antifuse-based Axcelerator FPGAs. Developed, verified and supported by Actel, the new UTOPIA CoreU1LL, CoreU1PHY and CoreU2PHY DirectCores are targeted at asynchronous transfer mode (ATM) communication system developers for their next-generation ATM local area network (LAN) and ATM over SONET/SDH applications, as well as virtual private networks (VPN), frame-relay backbones and residential broadband networks.

All cores are available in netlist and RTL formats. Free evaluation versions are also available. Data sheets can be downloaded from www.actel.com/products/ip/comm.html.

For more information contact Kobus van Rooyen, ASIC Design Services, 011 315 8316, [email protected]



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