Design Automation


IDE gains new ease-of-use features plus 60% performance improvement

10 September 2003 Design Automation

The new Actel Libero integrated design environment (IDE) version 5.0 for the design and development of its field-programmable gate arrays (FPGA) families, has enhanced synthesis and place-and-route tools. The new design suite is able to offer a more than 60% performance improvement for the company's successful, flash-based ProASICPLUS family.

Actel's Designer v5.0, the physical design tool suite within the Libero IDE, offers designers new features, including a comprehensive ChipPlanner for user-driven device floorplanning and a powerful Multi-View Navigator graphical interface. The Libero IDE v5.0 also features expanded interfaces to external tools, such as the Precision and LeonardoSpectrum synthesis tools from Mentor Graphics, the Synplify Pro synthesis software from Synplicity, and Actel's programming and debugging tools.

"In today's environment, FPGA designers will not tolerate broken or confusing design flows that impact design progress. Therefore, we continue to enhance the Libero IDE with new features and capabilities to make the process as intuitive and painless as possible. Further, the new external tool interfaces allow both FPGA and ASIC users to plug their tools of choice into the flow," said Saloni Howard-Sarin, tools marketing director at Actel.

Version 5.0 features Synplicity's Synplify 7.3 software, which includes several quality of results enhancements and improved performance for Actel's FPGA families. Also included in the new version of the Libero tool suite are many functional and ease-of-use improvements via SynaptiCAD's WaveFormer Lite v9.0 and Mentor Graphics' ModelSim v5.7 offerings.

"FPGA designers today are looking for complete integrated design environments to help accelerate their time to market," said Tom Feist, director of product marketing, FPGA Synthesis, Mentor Graphics. "By partnering with Actel, we are meeting this requirement by offering our mutual customers Mentor's industry-leading point tools, such as ModelSim, LeonardoSpectrum and Precision Synthesis, integrated within the Libero design environment, as well as offering Actel's Designer v5.0 within our own integrated environment, FPGA Advantage."

"SynaptiCAD has continued its partnership with Actel to provide best-in-class EDA tools for designers of Actel's FPGAs," said Dan Notestein, president of SynaptiCAD. "The easy-to-use WaveFormer Lite test bench generation system fits seamlessly into the Actel Libero IDE and allows designers to meet their time-to-market goals when designing current and next-generation FPGAs."

The Actel Designer v5.0 software contains several ease-of-use enhancements, including ChipPlanner and the Multi-View Navigator. A comprehensive graphical interface for user-driven device floorplanning, ChipPlanner enables designers to achieve the best tradeoffs between optimal design density and performance through the management of regions, logic placement, I/O assignment and routing.

The Actel Libero IDE v5.0 is available in three editions - Platinum, Gold and Silver.

For more information contact Kobus van Rooyen, ASIC Design Services, 011 315 8316, [email protected]



Credit(s)



Share this article:
Share via emailShare via LinkedInPrint this page

Further reading:

Advanced STM32 debugging in VS Code
Design Automation
Once an STM32 project is running in VS Code, the IAR C-SPY Debug extension adds a professional-grade analysis layer that scales with project complexity.

Read more...
Accelerate development of AI-enabled embedded systems
Design Automation
ADI’s CodeFusion Studio (CFS) is a modern embedded software development platform aimed at accelerating the creation of AI-enabled embedded systems.

Read more...
Introducing STM32CubeMX2
Altron Arrow Design Automation
STMicroelectronics has launched STM32CubeMX2, a new evolution of its popular configuration and code generation tool for STM32 microcontrollers.

Read more...
Miniature xtal for critical timing
ASIC Design Services Telecoms, Datacoms, Wireless, IoT
Microchip’s EX-423 Evacuated Miniature Crystal Oscillator is a compact, low-power timing solution designed for applications that demand high stability, accuracy, and long-term reliability.

Read more...
AI assistant for STM32 developers
Design Automation
The STMicroelectronics STM32 Sidekick is an AI-driven assistant fully integrated into the STM32 ecosystem designed to streamline embedded development using STM32 microcontrollers.

Read more...
Connected without limits: An engineering perspective on Altron Arrow’s wireless ecosystem
Altron Arrow Editor's Choice Design Automation
Wireless connectivity is no longer a supporting technology, but rather, a core design consideration that underpins modern electronic systems across industries.

Read more...
Next-gen robotic systems initiative
EBV Electrolink Design Automation
EBV Elektronik recently introduced MOVE – Driving Robotics Forward, a new initiative designed by EBV Elektronik‘s Embedded Solutions team to support the development of next-generation robotic systems.

Read more...
Reliable isolation for modern networks
ASIC Design Services Computer/Embedded Technology
The Pro-Tek5 PTI Series delivers reinforced 5 kV Ethernet isolation for applications that demand robust protection, reliable signal integrity, and full IEEE802.3 performance.

Read more...
Reference design for NB-IoT plus GNSS
Altron Arrow Design Automation
ST Microelectronics’ STDES-ST87M01IGN is a reference design for the ST87M01 NB-IoT + GNSS module, implemented on a 2-layer FR4 PCB (90 x 60 x 1,6 mm).

Read more...
ARINC 429 line driver evaluation board
ASIC Design Services DSP, Micros & Memory
Holt Integrated Circuits have announced the release of the ADK-85104 Evaluation Board, a compact, ready-to-use platform designed to help engineers rapidly evaluate and characterise Holt’s HI-85104.

Read more...









While every effort has been made to ensure the accuracy of the information contained herein, the publisher and its agents cannot be held responsible for any errors contained, or any loss incurred as a result. Articles published do not necessarily reflect the views of the publishers. The editor reserves the right to alter or cut copy. Articles submitted are deemed to have been cleared for publication. Advertisements and company contact details are published as provided by the advertiser. Technews Publishing (Pty) Ltd cannot be held responsible for the accuracy or veracity of supplied material.




© Technews Publishing (Pty) Ltd | All Rights Reserved