DSP, Micros & Memory


Ultra low power MCU family ideal for modern mixed-signal applications

24 September 2003 DSP, Micros & Memory Transport (Industry) Security by Industry Sector

By partnering a modern CPU with modular memory-mapped analog and digital peripherals, Texas Instruments' MSP430 family of microcontrollers offers solutions for today's and tomorrow's mixed-signal applications. A 16-bit RISC CPU, peripherals and flexible clock system are combined by using a von-Neumann common memory address bus (MAB) and memory data bus (MDB) (see Figure 1).

Figure 1. Modular architecture: MSP430 von-Neumann architecture – all program, data memory and peripherals share a common bus structure. Consistent CPU instructions and addressing modes are used
Figure 1. Modular architecture: MSP430 von-Neumann architecture – all program, data memory and peripherals share a common bus structure. Consistent CPU instructions and addressing modes are used

Key features:

* Ultra-low-power architecture - 0,1 µA RAM retention, 0,8 µA realtime clock mode, 250 µA/MIPS active.

* High-performance analog, ideal for precise measurement.

* Modern 16-bit RISC CPU enables new applications at a fraction of the code size.

* In-system programmable Flash permits flexible code changes, field upgrades and data logging.

* Memory options: Flash, ROM, OTP versions (from 1 to 60 kB) and RAM up to 10 kB.

* Low cost development tools.

16-bit RISC CPU

With the modern 16-Bit RISC, CPU benefits are: large register file eliminates accumulator bottleneck; optimised for C and assembler programming; compact core design reduces power and cost; up to 8 MIPS of performance is available.

The MSP430's orthogonal architecture provides the flexibility of 16 fully addressable, single-cycle 16-bit CPU registers and the power of a RISC. The modern design of the CPU offers versatility through simplicity using only 27 easy-to-understand instructions and seven consistent-addressing modes. This results in a 16-bit low-power CPU that has more effective processing, is smaller-sized, and more code-efficient than other 8-/16-bit microcontrollers (see Figure 2). This development means it is now possible to develop new ultra-low-power, high-performance applications at a fraction of the code size.

Figure 2. MSP430 modern orthogonal 16-bit RISC CPU core has 16 16-bit registers, 27 single-cycle instructions and seven addressing modes and results in higher processing efficiency and code density
Figure 2. MSP430 modern orthogonal 16-bit RISC CPU core has 16 16-bit registers, 27 single-cycle instructions and seven addressing modes and results in higher processing efficiency and code density

Flexible clock system

The MSP430 clock system is designed specifically for battery-powered applications. The low-frequency auxiliary clock is for ultra-low-power standby mode, while the high-speed master clock is for high-performance processing. Multiple oscillators are used to support event-driven burst activity. A low frequency auxiliary clock (ACLK) is driven directly from a common 32 kHz watch crystal - with no additional external components. The ACLK can be used for a background realtime clock self wakeup function. An integrated high-speed digitally controlled oscillator (DCO) can source the master clock (MCLK) used by the CPU and high-speed peripherals. By design, the DCO is active and stable in less than 6 µs. MSP430-based solutions efficiently use 16-bit RISC CPU high-performance in very short burst intervals, which results in very high-performance and ultra-low power consumption (see Figure 3).

Figure 3. Ultra-low-power activity profile – ultra-fast 6 µs DCO start-up allows MSP430 systems to remain in low-power modes for the longest possible interval – extending battery life. The DCO is fully user programmable
Figure 3. Ultra-low-power activity profile – ultra-fast 6 µs DCO start-up allows MSP430 systems to remain in low-power modes for the longest possible interval – extending battery life. The DCO is fully user programmable

High performance analog

Several high-performance ADCs are available in the MSP430 family (eg, 12/10-bit fast SAR ADCs; 14-bit high-resolution SAR ADCs; 16-bit slope ADCs; 16-bit sigma delta ADCs). Innovative comparator-gated timers are available on all devices for high resolution slope type conversions. This is ideal for measuring resistive sensors such as thermistors when coupled with a capacitor.

A fast 200 kSa/s 12 bit ADC with very high integration is available on the MSP430F13x/14x/16x/43x/44x and is ideal for demanding applications such as electricity meters and digital motor control while MSP430x32x derivatives offer a 14 bit ADC with a programmable current source.

Flash emulation

The MSP-FET430 Flash emulation tool (FET) supports complete in-system development and is available for Flash devices. Programming, assembler/C-source level debug, single stepping, multiple hardware breakpoints, full-speed operation and peripheral access are all fully supported in-system using JTAG. The FET comes complete with everything required to complete an entire project.

Embedded emulation

Embedded emulation means: development is in-system and subject to the exact same characteristics of the final application; it is non-obtrusive in portable and high-pin count situations; has common user software and physical interface.

Today's applications operating at lower voltages, with tighter packaging and higher-precision analog, benefit greatly from the MSP430's in-system emulation approach. The MSP430's dedicated embedded emulation logic resides on the actual device itself and is accessed via industry standard JTAG using no additional system resources. From the first day of development, firmware engineers can unobtrusively develop and debug their embedded code with full-speed execution, breakpoints, and single steps in an application.

Embedded emulation becomes even more important with high performance mixed-signal systems that must maintain the integrity of microvolt analog signals. Signal integrity is virtually impossible with cumbersome in-circuit emulators that are sensitive to cabling crosstalk. And, unlike abstract background debuggers, no time-sharing of system serial communication resources is required with embedded emulation on the MSP430.

By combining the flexibility of in-system programmable Flash memory, unobtrusive embedded emulation, and a common user interface, development time is reduced. And, should the situation arise, last minute code updates as well as remote scheduled and unscheduled upgrades can also be made.

For more information contact Analog Data Products, a division of Avnet Kopp, 011 809 6100, [email protected]





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