Actel has announced it has enhanced its Libero integrated design environment (IDE) to include Magma Design Automation's PALACE (physical and logical automatic compilation engine) physical synthesis tool. Through a new OEM agreement with Magma, the PALACE software, which can provide an average of 20% higher performance for ProASICPLUS FPGAs, is available from Actel as a standalone tool or bundled with Actel's Libero IDE. In addition, Actel announced that the Silver and Gold Editions of the Libero v5.1 IDE now provide device support for up to 300 000 gates, delivering support at little or no cost for many of Actel's larger gate count devices.
The PALACE physical synthesis tool provides fast timing closure and predictability while reducing design costs and design cycles, says Actel. The simple-to-use tool accepts an interpreted netlist and makes optimal placement decisions based on constraints and detailed design and interconnect modelling. The PALACE tool provides further benefit to the user by quickly achieving performance requirements without modifying the HDL or schematic design source. The PALACE software initially supports Actel's ProASICPLUS family of FPGAs.
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