FPGA synthesis tool adds support for Altera and Xilinx FPGAs

24 March 2004 Design Automation Products & Solutions

Synplicity has enhanced its Amplify FPGA physical synthesis and Synplify Pro FPGA synthesis software to include new support for Altera and Xilinx devices. With this version, the Synplify Pro software offers new features to support the Stratix II family of FPGAs from Altera. Enhancements to Synplicity's Amplify FPGA physical synthesis software include support for a hierarchical timing report, enabling faster timing closure, and support for the low-cost Spartan 3 family of FPGAs from Xilinx.

The latest Synplify software version includes an auto-constraint feature, providing savings in design time and a further advantage in timing performance. This unique automatic constraint feature automatically tightens timing constraints until a maximum clock frequency is achieved. This is done incrementally without the need to completely re-run synthesis. Auto-constraint typically gets within 5% of what handcrafted constraints can achieve, according to the company.

Synplicity claims its Amplify FPGA software is the only true physical synthesis tool for FPGAs. Other tools perform physical re-optimisations based upon initial place and route, but only the Amplify software performs simultaneous detailed placement and physical optimisations all the way from RTL through placed gates, resulting in higher-level optimisations and improved timing closure. In the latest version, Synplicity extracts a design's physical hierarchy and reports it through a hierarchical 'island' timing report. The island-based timing report enables faster timing closure by providing users with detailed guidance in order to make it easier to understand what portion of a design should be floorplanned.

For more information contact Franco Giangregorio, Parsec, 012 349 2282.

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