Actel has joined with Inicore, an intellectual property and design services partner, to deliver a turnkey design solution to the Targa Systems division of L3 Communications for a new line of data storage products for military and rugged applications.
L-3 Targa Systems designed two new data storage products - one using Actel's A54SX08A FPGA and the other using an A54SX72A FPGA device. In addition, Inicore provided VME and ATA IP cores for the designs, while Actel delivered a CorePCI core that served as a bridge interface for the new products. By providing pre-verified IP, Actel and Inicore said it helped reduce design time and provided L-3 Targa Systems with the ability to integrate multiple design elements into a one-chip solution, reducing component count and cost.
"We were extremely impressed with the complete package that was delivered by Actel and Inicore and believe these types of turnkey design solutions are the wave of the future," said Dave Saunders, general manager at L-3 Targa Systems.
"By leaving the semiconductor IP building blocks and silicon design work to Actel and Inicore, we were able to concentrate on adding value to the products in other areas, which substantially benefited the overall system designs." said Yankin Tanurhan, a senior director at Actel.
"IP building blocks coupled with Inicore's system-level integration expertise played an integral role in enabling first-pass design success. In addition, the high reliability and extended temperature range provided by our tamper-proof SX-A devices met the stringent requirements for L-3 Targa Systems' extremely rugged products," he added.
Siemens acquires Canopus AI ASIC Design Services
News
The acquisition extends Siemens’ comprehensive EDA software portfolio with computational metrology and inspection to help chipmakers solve critical technical challenges in semiconductor manufacturing.
Read more...Aligning clocks over large distances ASIC Design Services
Test & Measurement
SkyWire technology from Microchip makes it easier to align and compare clocks within nanoseconds across geographic locations.
Read more...High-accuracy time transfer solution ASIC Design Services
Telecoms, Datacoms, Wireless, IoT
Microchip Technology recently announced the release of the TimeProvider 4500 v3 grandmaster clock (TP4500) designed to deliver sub-nanosecond accuracy for time distribution across 800 km long-haul optical transmission.
Read more...New RT PolarFire device qualifications ASIC Design Services
DSP, Micros & Memory
Microchip expands space-qualified FPGA portfolio with new RT PolarFire device qualifications and SoC availability.
Read more...Siemens’ software selected for verification and validation ASIC Design Services
Design Automation
Siemens Digital Industries Software recently announced that Veloce Strato CS and Veloce proFPGA CS have been deployed at Arm, a longtime user of Veloce, as part of its design flow for Arm Neoverse Compute Subsystems.
Read more...XJTAG launches two new Flash programmers ASIC Design Services
DSP, Micros & Memory
XJTAG has announced XJExpress and XJExpress-FPGA, a pair of Flash programmers perfect for development, debug and in-service applications.
Read more...Siemens unveils groundbreaking Tessent AnalogTest software ASIC Design Services
Design Automation
Siemens Digital Industries Software recently introduced Tessent AnalogTest software - an innovative solution that reduces pattern generation time for analogue circuit tests from months to days.
Read more...Advanced PMIC for high-performance AI applications ASIC Design Services
Power Electronics / Power Management
Microchip Technology has announced the MCP16701, a Power Management Integrated Circuit (PMIC) designed to meet the needs of high-performance MPU and FPGA designers.
Read more...MPLAB PICkit Basic ASIC Design Services
Design Automation
To make its robust programming and debugging capabilities accessible to a wider range of engineers, Microchip Technology has launched the MPLAB PICkit Basic in-circuit debugger.
While every effort has been made to ensure the accuracy of the information contained herein, the publisher and its agents cannot be held responsible for any errors contained, or any loss incurred as a result. Articles published do not necessarily reflect the views of the publishers. The editor reserves the right to alter or cut copy. Articles submitted are deemed to have been cleared for publication. Advertisements and company contact details are published as provided by the advertiser. Technews Publishing (Pty) Ltd cannot be held responsible for the accuracy or veracity of supplied material.
printer friendly version