Programmable Logic


Lower-cost and improved performance CPLDs

22 September 2004 Programmable Logic

Altera has begun shipping the first member of its MAX II device family, the EPM1270 device. Based on Altera's innovative look-up table (LUT)-based CPLD architecture, the company says the MAX II family is half the cost and consumes only one-tenth the power of previous MAX generations, while maintaining the same single-chip, non-volatile and ease-of-use characteristics of the original MAX series.

With four times the density and more than twice the performance of prior-generation MAX CPLDs, engineers designing for high-volume, price-sensitive markets can use the cost and performance advantages to replace more expensive and less flexible low-density ASICs and ASSPs often used for critical system control functions. The MAX II device family includes four members ranging in density from 240 to 2210 logic elements (LEs).

Since its introduction in March 2004, the MAX II device family has experienced strong interest from customers spanning the communications, computing, consumer, industrial and automotive markets, says Altera.

MAX II devices are supported now by the Quartus II design software, that now features a built-in MAX+PLUS II software look-and-feel option. Thus users can benefit from the Quartus II features without having to learn a new graphical user interface. A development kit featuring the EPM1270 will also be available. The kit includes a PCI form factor PCB with a 32-bit edge connector, programming and USB cables, several demonstration designs, Quartus II Web Edition development software and complete documentation.



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