Intel is addressing developers' complex timing issues and faster-design requirements through the simplified slot switching (SSS) features of its IXF3461 combination Line Interface Unit (LIU) and framer. Intel says that its new LIU handles critical cross-connect timing internally, so slot switching with the IXF3461 device can help reduce design complexity, shorten testing time and enable quick delivery of reliable systems to market.
The IXF3461 is a fully integrated T1/E1/J1 LIU and framer. According to the company it is the only combination LIU and framer to feature a fully integrated cross-connect switch (XCS). The XCS is designed for use in 1,544 Mbps applications (T1 or J1), or in 2,048 Mbps applications (E1). It can interchange both data and signalling in any time slot on any port (system or line) with any other time slot on any other port. The highly integrated IXF3461 solution is ideally suited for the convergence of voice and data communications.
Flexibility and control
In addition to its flexible and programmable system interface, the slot switching capability of the IXF3461 allows direct control of timeslot assignment on the system bus. The IXF3461 works from a single reference clock input and generates all required T1/E1 clocks internally. Available in a 160-pin MQFP or PBGA package with 3,3 V CMOS technology, Intel says it can be used with T1/E1/J1 equipment to efficiently build low-cost, low-power systems. The XCS can also be combined with a PCM highway system interface (CGSB) to implement a full non-blocking, 128 x 128-channel, cross-connect function between two independent IXF3461 LIUs.
For carriers, it incorporates innovations such as a flexible on-chip BERT and programmable pattern generator/detection testers, configuration, diagnostic and monitoring features, and elastic buffer pointer position indicators for calculating delays. In addition to standard network line, payload and timeslot loopbacks, the IXF3461 provides corresponding loopbacks to the system side. These loopbacks, when used with the embedded BERT and programmable pattern generator/detection testers, provide both in-service and out-of-service data path fault detection and isolation capabilities. Integrated alarm signaling also helps reduce system processor loading.
This innovative T1/E1/J1 LIU and framer is fully switchable, allowing you to design a single board to support T1, E1 and J1 applications with no receive loss compromise or external component changes. You can convert from T1 to E1 with a single IXF3461. An integrated clock adapter simplifies design and keeps your component count to a minimum. In addition, each LIU port can be independently controlled, enabling you to convert from one standard interface to another on a single chip. Six HDLC controllers and the time slot switching capabilities make the IXF3461 your best choice for GR303/V5.2 applications with voice and data integration.
An evaluation kit that includes a four-port reference design complete with protection circuitry, a comprehensive API and a GUI is offered to help simplify an otherwise complex system design. The pulse template matching software facilitates design efforts and assures design conformance to stringent specifications. The evaluation kit also includes all design files to help speed product development and introduction to market.
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