DSP, Micros & Memory


Powerful data acquisition module for digital signal processing

6 April 2005 DSP, Micros & Memory

Sundance has released to market a high throughout configurable data acquisition module (DAQ).

The SMT391 is a powerful 1 GSPS, 8-bit, dual channel analog-to-digital converter (ADC) that is well-suited for high bandwidth applications such as high-speed test and instrumentation, satellite communications, software defined radio (SDR), direct RF/IF processing, direct RF down conversion, and radar.

The SMT391, a 'daughter module' that outputs data to a network of Sundance's reconfigurable computing and DSP systems, is managed by a Xilinx Virtex-II Pro FPGA. This FPGA, with its IBM PowerPC embedded processor capabilities, manages the data transfers to a variety of communication channels such as ComPorts, Sundance High-speed Bus, and Xilinx RocketIO Multi Gigabit Transceivers. These channels are compatible to a wide range of Sundance processors and I/O modules. The FPGA controls all digital functions on the module as the digital output of the Atmel broadband converter is fed into the FPGA. This data is then stored in an onboard DDR SDRAM for non realtime processing.

A highly compact twin board design makes up the SMT391. A top layer board, the daughter board, is coupled to a base module via a Sundance LVDS Bus. This daughter board contains all the analog circuitry, the clock generation, trigger control, analog signal conditioning and a converter. This device handles all data acquisition and conversions. Analog data enters the top module via two analog data streams that are pre-conditioned before they enter the dual channel ADC converter. In conjunction to the two analog inputs, users can also provide the module with a custom clock and trigger.

The base module is a reconfigurable computing system also powered by a Xilinx Virtex-II Pro FPGA. The FPGA is centred on the base module as it controls all digital functions on the module. The analog circuitry is separated from the digital, reducing cross-talk. Configuring the main FPGA is done via on-board and in-system programmable logic that is configured through an on-board JTAG interface. Configuration, sampling and transfer modes are set by configuration data received over the ComPorts or the RocketIO Serial Links.

Designed for high-speed I and Q channel type applications, the SMT391 has two identical channels and all settings are applicable to both. Operations for both channels are the same, and there is only one sample clock for both channels and both channels will respond to the same trigger. The dual channel Atmel converter converts the analog data, and a single 16 bit parallel data-stream is generated for each channel.

For more information contact Hendri Veldman, Sundance Multiprocessor Technology, 0944 1494 793194, [email protected]





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