IBM orders high volume C4NP bumping line

19 October 2005 News

IBM has ordered the first C4NP (controlled collapse chip connection - new process) high-volume bumping line from SUSS MicroTec, of Switzerland. The IBM order is for a fully automatic bumping line that can accommodate up to 300 wafer starts per day.

Pioneered by IBM, C4NP is a breakthrough in wafer solder bump technology, a semiconductor packaging technique that places pre-patterned solder balls onto the surface of a chip. These bumps ultimately carry data from individual chips to the rest of a computing system. C4NP is a simple and cost-effective alternative to the expensive and difficult electroplating process, says IBM.

Chip packaging technology plays a pivotal role in how a product performs, and advances in packaging can translate into improved function. In addition, the C4NP process enables completely lead-free wafer bumping, which is being required by European and Asian electronics manufacturers.

IBM, who invented and developed the C4NP technology, engaged SUSS in September 2004 to develop the necessary equipment for this process. IBM will use a prototype line in East Fishkill, N.Y. to perfect the C4NP process on the SUSS tool set. It is being made available for customer review to help customers better understand the benefits of C4NP technology.

www.ibm.com

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