Building on nearly 15 years of CPLD leadership and innovation, Altera released its MAX II family. The MAX II devices are based on a new look-up table (LUT)-based architecture that it claims delivers the lowest cost per I/O pin on the market and breaks new ground in CPLD architectures. This instant-on, non-volatile device family targets general-purpose, low density logic applications, enabling designers to leverage the benefits of industry leading CPLD devices in lieu of small ASICs and ASSPs, which are costlier and less flexible.
These MAX II devices operate at around one-tenth the power of the previous-generation of MAX devices. They offer densities ranging from 240 to 2210 logic elements (LEs) (192 to 1700 equivalent macrocells) and up to 272 user I/O pins.
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Design Automation
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News
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