Actel has announced the release of Libero Integrated Design Environment (IDE) v7.0 and Designer v7.0 FPGA development software.
Libero IDE v7.0 introduces support for the new Actel FusionT Programmable System Chip (PSC) - the world's first mixed-signal FPGA. Fusion FPGAs integrate configurable analog, large Flash memory blocks, comprehensive clock generation and management circuitry, and high-performance programmable logic in a monolithic device.
The new IDE also includes the new SmartGen core generator (replacing ACTgen). SmartGen supports the generation and configuration of Fusion peripherals, such as analog blocks, realtime counters (RTC), on-chip memories including RAM, and user FlashROM memory. Libero v7.0 provides complete file management, synthesis, simulation, testbench generation, and optimised place-and-route for Fusion and all other Actel FPGA devices.
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