Arithmatica's CellMath tools now include Verilog interface
28 June 2006
Design Automation
Verific Design Automation has licensed its hardware description language (HDL) component software to Arithmatica, the first company focused solely on using advances in silicon math algorithms to lower costs and power and increase speed for maths-intensive ICs. Such ICs are used in 3D graphics, imaging, multimedia, wireline and wireless communications, and embedded processing.
Verific Design Automation develops and sells C++ source code-based SystemVerilog, Verilog and VHDL front ends - parsers, analysers and elaborators - as well as a generic hierarchical netlist database for EDA applications.
Arithmatica says it integrated Verific's Verilog parser and register transfer level (RTL) elaborator with its CellMath tools to provide tighter flow integration for Verilog users. The newly-released CellMath Verilog interface feature provides Verilog designers familiar and easy-to-use syntax to specify robust datapath structures. The Verilog input language uses pragmas to explicitly instantiate advanced arithmetic datatypes such as carrysave wires and features such as internal rounding.
Additionally, the companies have worked jointly on partitioning datapath logic within a logic module for synthesis in CellMath Designer, further streamlining the Verilog hardware designer's implementation flow.
For more information see www.arithmatica.com and www.verific.com
Further reading:
Why LabVIEW is critical to South Africa’s automation future
Design Automation
[Sponsored] In a world increasingly defined by connected systems, edge intelligence, and accelerating automation, the ability to build scalable, responsive, and maintainable engineering applications has never been more essential, and at the heart of this evolution lies LabVIEW.
Read more...
Take analogue designs from idea to reality
Design Automation
Bringing your analogue design ideas to life is simple with Microchip’s Analog Development Tool Ecosystem, part of its extensive range of solutions for both analogue and digital engineers.
Read more...
Accurate power estimation
Design Automation
AMD Power Design Manager 2025.1 is now available – with support for AMD Versal AI Edge and Prime Series Gen 2 SoCs and production support for AMD Spartan UltraScale+ devices.
Read more...
AMD Vivado Design Suite 2025.1
Design Automation
AMD Vivado Design Suite 2025.1 is here, and now with support for AMD Spartan UltraScale+ and next-generation Versal devices.
Read more...
Siemens streamlines design of integrated 3D ICs
Design Automation
Siemens Digital Industries Software recently introduced two new solutions to its EDA portfolio.
Read more...
Webinar: Designing in a connected environment
Design Automation
With Altium Designer and its data management platform, the team will always be up to date with the latest design documents and be able to comment on schematic, PCB, BOM and assembly drawings.
Read more...
ST’s graphical no-code design software
Design Automation
MEMS-Studio is a complete desktop software solution designed to develop embedded AI features, evaluate embedded libraries, analyse data, and design no-code algorithms for the entire portfolio of ST’s MEMS sensors.
Read more...
LibGSM – A powerful, modular GSM library
eiTech Systems
Design Automation
Whether you are building SMS, MQTT, HTTP or other GSM-based applications, eiTech’s LibGSM library helps streamline development with its carefully structured design.
Read more...
NECTO Studio V7.2 IDE with code assistant
Design Automation
MIKROE recently announced that NECTO Studio 7.2 IDE now includes NECTO Code Assistant, an AI tool that enables users to create code for multi-Click projects.
Read more...
MPLAB unified compiler licenses
Design Automation
Offering an efficient way to manage multiple licenses, Microchip Technology has launched MPLAB XC unified compiler licenses for its MPLAB XC8, XC16, XC-DSC and XC32 C compilers.
Read more...
printer friendly version