Addressing the tight power budgets of the portable market, Actel has introduced the IGLOO family, claimed to be the industry’s lowest power field-programmable gate arrays (FPGAs).
With 5 μW static power, the company claims that this flash-based family consumes 4x less static power than its nearest competitor and delivers more than 5x the battery life of the current leading PLDs in portable applications.
Because of the short product life cycles and competition in this marketplace, designers require a growing list of features and complexity - but not at the expense of draining the battery. This makes the reprogrammable, fully-featured Actel IGLOO solutions attractive as an alternative to ASICs and CPLDs for portable applications. In addition to being the only low-power FPGA solution to support 1,2 V, the IGLOO family has several power modes to optimise power consumption: the Flash*Freeze mode; a low-power active mode; and a sleep mode.
While in Flash*Freeze mode, power is conserved while maintaining FPGA content. Device I/Os are tri-stated and SRAM and register content is maintained, but not clocked. Further, the Flash*Freeze pin enables designers to quickly and easily enter or exit the Flash*Freeze mode (within 1 μs). Alternatively, the low-power active mode allows the device to directly control when the system goes into low-power mode. While in this mode, the devices are able to offer low-power capabilities, leaving the FPGA core, clocks and all I/O, functional. When designing high-density devices, the IGLOO sleep mode can drop power below 25 μW when power to the FPGA core is removed.
The Actel IGLOO family features up to three million system gates and offers up to 616 user I/Os, six phase-locked loops (PLLs), 504 Kbits of RAM and 350 MHz performance in both commercial and industrial grades. It is offered in a small form factor (8 x 8 mm), high-density (196-pin) chip scale package.
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