Altera claims its Stratix III FPGA family delivers the industry’s lowest power consumption of any high-density, high-performance programmable logic device.
Built on TSMC's 65 nm process, Stratix III FPGAs feature hardware architecture advancements and Quartus II software enhancements. According to the company, these new features together deliver 50% lower power, 25% higher performance and twice the density compared to previous generation Stratix II devices.
Altera Stratix III FPGAs feature two new technologies that significantly lower power while meeting high-performance requirements. Reduced power consumption is achieved by its innovative Programmable Power Technology, which maximises performance where needed while delivering the lowest power elsewhere in the design. It enables every programmable logic array block (LAB), DSP block and memory block to independently operate at highspeed or low-power mode. The PowerPlay feature in Quartus II software Version 6.1 automatically analyses the design and identifies which blocks are in the critical path and demand the highest performance, setting these to high-speed mode. All other logic is automatically put into low-power mode. The second power-optimising feature, Selectable Core Voltage, provides the designer options to select either 1,1 V for designs needing the highest performance or 0,9 V for designs requiring minimum power consumption.
"The OneBase family of Base Station Systems offers network operators a range of techniques and deployment technologies to meet build-out requirements and deliver coverage, capacity and high-quality service to end-users," said Bob Suffern, vice president, research and development at Andrew Corporation.
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