Mentor Graphics listed as an HDL design market leader
14 February 2001
Design Automation
Mentor Graphics has announced that it has strengthened its leadership in the HDL design market, having been listed as the leader in both FPGA synthesis and VHDL simulation in a November 2000 Gartner Dataquest report titled, "EDA 2000: Sorting through the confusion."
According to the Gartner Dataquest report, Mentor's LeonardoSpectrum tool maintained its FPGA synthesis lead in 1999 for the third consecutive year, with 38% market share. Mentor's ModelSim simulation tool for ASIC and FPGA design commanded 59% of the VHDL market in 1999, making it the leader for five consecutive years. The Gartner Dataquest report also showed a greater than 80% gain in Mentor's Verilog simulation market share from the previous year.
"Our focus on the HDL design market has resulted in the development of some of the EDA industry's best point tools," said Anne Sanquini, Vice President and General Manager for the HDL Design division of Mentor Graphics. "Moving forward, our leading point tools such as LeonardoSpectrum and ModelSim - as well as our targeted design flows like FPGA Advantage - will enable our customers to address the complexities of multimillion gate designs that will be tomorrow's standard."
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