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Electronics Buyers' Guide

Electronics Manufacturing & Production Handbook 2019


 

Low-power Flash-based PGA family
6 February 2008, Programmable Logic

Extending its portfolio of low-power programmable solutions, Actel has introduced the ProASIC3L family of field-programmable gate arrays (FPGAs) for designers of high-performance, power-conscious systems. Featuring 40% lower dynamic power and 90% lower static power than its previous-generation ProASIC3 FPGAs, the new Flash-based family combines dramatically reduced power consumption with up to 350 MHz operation.

As a result, designers in high-performance market segments, such as industrial, medical and scientific, now have access to flexible, feature-rich solutions that offer speed, low power and low cost. The ProASIC3L family also supports the free implementation of an FPGA-optimised 32-bit ARM Cortex-M1 processor.

Dynamic power is critical in applications where clocks are constantly switching and providing input to an FPGA, such as high-speed data pipelines for portable video and medical appliances. The ProASIC3L devices support a 1,2 V core voltage and Actel's innovative Flash*Freeze technology. Flash*Freeze enables designers to quickly switch the device from dynamic operation to static without switching off clocks or power supplies.

The ProASIC3L family is comprised of four family members ranging from 250 000 to 3 000 000 gates: the A3P250L, A3P600L, A3P1000L and A3PE3000L. Offered in both commercial and industrial temperature grades, the devices feature embedded SRAM memory, high I/O counts, phase-locked loops (PLLs) and non-volatile memory.


Credit(s)
Supplied By: ASIC Design Services
Tel: +27 11 315 8316
Fax: +27 11 315 1711
Email: info@asic.co.za
www: www.asic.co.za
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Further reading:

  • Radiation-tolerant PolarFire FPGA
    23 October 2019, Avnet South Africa, Programmable Logic
    Developers of spacecraft electronics use radiation-tolerant (RT) field programmable gate arrays (FPGAs) to create on-board systems that meet the demanding performance needs of future space missions, survive ...
  • FPGA video and image processing ecosystem
    26 June 2019, Altron Arrow, Programmable Logic
    Microchip Technology, via its Microsemi subsidiary, announced its Smart Embedded Vision initiative that provides solutions for designing intelligent machine vision systems with Microchip’s low-power PolarFire ...
  • RISC-V based FPGA architecture
    30 January 2019, Altron Arrow, Programmable Logic
    Microchip, via its Microsemi Corporation subsidiary, announced an extension to its Mi-V ecosystem by unveiling the architecture for a new class of SoC FPGAs at the RISC-V Summit during December 2018. ...
  • RFSoC architecture by Xilinx
    14 November 2018, Avnet South Africa, Telecoms, Datacoms, Wireless, IoT, Programmable Logic
    Xilinx rolled out its Zynq UltraScale+ RFSoC family, an architecture integrating the RF signal chain into a system-on-chip (SoC) for high-performance RF applications. Based on the 16 nm UltraScale+ ...
  • RISC-V based FPGA architecture
    14 November 2018, Altron Arrow, Programmable Logic
    Microchip, via its Microsemi Corporation subsidiary, announced an extension to its Mi-V ecosystem by unveiling the architecture for a new class of SoC FPGAs at the RISC-V Summit during December 2018. ...
  • Thermal design incorporating EDA and MDA design flows
    13 June 2018, ASIC Design Services, Design Automation
    Electronics cooling design and simulation applications have to be quick, reliable and integrated into a fast-moving, complex design process.
  • DFT assistant for Mentor Xpedition
    13 June 2018, ASIC Design Services, Test & Measurement
    Developed by XJTAG, the free XJTAG DFT Assistant for the Mentor Xpedition Designer product increase the design for test (DFT) and debug capabilities of the schematic capture and PCB design environment. ...
  • Embedded deep learning framework for FPGAs
    18 April 2018, ASIC Design Services, This Week's Editor's Pick, Programmable Logic
    ASIC Design Services has developed a scalable and flexible embedded deep learning solution that allows for the implementation of a wide range of convolutional neural networks on FPGAs.
  • PolarFire FPGAs from Microsemi
    15 November 2017, ASIC Design Services, Electronics Technology
    Microsemi unveiled the cost-optimised PolarFire field programmable gate array (FPGA) product family, delivering what the firm claimed as the industry’s lowest power at mid-range densities with 12,7 ...
  • XJTAG updates boundary scan software
    11 October 2017, ASIC Design Services, Test & Measurement, Design Automation
    XJTAG has launched a major update to its flagship software, XJDeveloper. XJTAG’s unified test and programming IDE, XJDeveloper, is a development and debug environment that makes it quick and easy to set ...
  • IDE supporting RISC-V instruction set architecture
    19 July 2017, ASIC Design Services, Design Automation
    Microsemi announced the release of its SoftConsole version 5.1, the world’s first available Windows-hosted Eclipse integrated development environment (IDE) for designs utilising RISC-V open instruction ...
  • Electronic Product Creation Seminars
    19 July 2017, ASIC Design Services, News
    Electronic Product Creation Seminars    14 August 2017 – Stellenbosch    16 August 2017 - Durban    17 August 2017 – Midrand ASIC Design Services, in conjunction with Mentor, a Siemens Business, XJTAG and ...

 
 
         
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