Programmable Logic


Actel releases Libero v8.5

4 February 2009 Programmable Logic

Actel has announced the availability of the Libero integrated design environment (IDE) version 8.5.

This comprehensive suite of software design tools extends support for the recently announced nano versions of Igloo and ProASIC3 field programmable gate arrays (FPGAs). Version 8.5 also introduces support for instantiation and configuration of embedded math blocks for use in Actel’s new radiation-tolerant RTAX-DSP family.

Actel nano FPGAs provide designers an efficient means to develop portable systems based on low-power, small-footprint FPGAs. Libero 8.5 adds design support for 16 distinct Igloo nano FPGAs in six different package types, and six distinct ProASIC3 nano FPGAs in three different packages.

Libero 8.5 support for RTAX-DSP FPGAs enables DSP development for the first time on the RTAX family with the implementation of an 18 bit x 18 bit math block. The math block is available in the Libero IDE catalogue macro cell library and can easily be implemented with SmartDesign or user HDL. The math blocks can be managed through Libero’s standard synthesis, simulation and layout flows.

The embedded radiation-tolerant DSP math block supports simple signed 18x18 multiply, dual signed 9x9 multiply, multiply plus accumulate, as well as cascaded multiply applications, enabling efficient implementation of DSP structures such as finite impulse response (FIR), infinite impulse response (IIR) digital filters, fast Fourier transforms (FFT) and inverse Fourier transforms (IFT), discrete cosine transforms (DCT), correlators, and digital IF up/down converters.



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