Circuit & System Protection


Design consequences of geometry 'shrinks'

2 November 2005 Circuit & System Protection

As we all know, the process geometries of both digital and analog integrated circuits are continually shrinking - with the clear advantages of lower power requirements, silicon areas and prices.

However, this reduction in geometry size does have implications for board designs. A simple substitution of a device manufactured with a 0,25 μm (micron) process in place of one manufactured in a 0,7 μm process can produce unexpected results.

Why is this? In theory, nothing has changed, but the evidence contradicts this. One option is to avoid using smaller-geometry devices, but this is very short-sighted. Such a decision means that systems will not benefit from lower power-supply voltages, faster speeds and lower cost - making them uncompetitive in a very short time.

The best approach is to design in the expectation that geometries will continue to shrink. An important issue to consider is increased susceptibility to electrostatic discharge (ESD). Smaller-geometry devices are less able to absorb high-voltage transients and lack robustness around high currents. The manufacturers' standards are not reduced, with a 2000 V r.m.s. to 4000 V r.m.s. ESD tolerance (Human Body Model). However, their tests look for catastrophic failures while the end-user can experience RAM contamination caused by electromagnetic interference (EMI) or electrical fast transient (EFT) signals.

A number of approaches can help with this problem, including protection circuits (MOVs, transient suppressors), microcontroller or processor pin protection (I/O, interrupt, reset pins), or firmware recovery techniques (WDT, register refresh), etc. All of these techniques help to produce a more-robust design, but the most significant results are achieved by layout optimisation.

To move to smaller-geometry devices, it is important to look at places on the board layout where spikes and glitches can enter the newly-sensitive circuits. One of the most productive places to look, is at the power-supply tracks. In a typical circuit, buck- or boost-converters provide the power supplies. This type of supply is inherently noisy, but there is also the risk of added EFT signals, in the form of voltage or current spikes. These may be quite acceptable in circuits using larger-geometry devices, but can cause problems as smaller geometries are used. A general rule-of-thumb is to minimise these effects by managing the power and ground traces (or planes). Finally, the circuit has always required decoupling or bypass capacitors, but now, accurate selection is critical. Figure 1 illustrates a range of techniques that offer different levels of effectiveness.

Figure 1. Connecting several devices with one ground and V<sub>DD</sub> trace; (a) can became a candidate for ground and power-supply loops. This topology also enhances power-supply glitches. Having ground, or V<sub>DD</sub> jumper (b) is a better solution, but not great. Creating a ground and V<sub>DD</sub> trace from device to device is a better solution (c) between these three. However, the best solution is to have separate ground and power-supply planes (d) in a multilayer board
Figure 1. Connecting several devices with one ground and VDD trace; (a) can became a candidate for ground and power-supply loops. This topology also enhances power-supply glitches. Having ground, or VDD jumper (b) is a better solution, but not great. Creating a ground and VDD trace from device to device is a better solution (c) between these three. However, the best solution is to have separate ground and power-supply planes (d) in a multilayer board

Summary

Of course, these are not new suggestions, but many engineers have discovered that not all of them have to be implemented too carefully for circuits using larger-geometry devices. Now, the situation is changing. As new silicon geometries work their way into designs, board layouts must be optimised with power glitches in mind: add protection circuits such as MOVs and transient suppressors; protect the I/O, interrupt and reset pins of the controller or processor; use firmware recovery techniques such as WDT or 'register refresh' so that they contain the correct values. All of these techniques will help to produce a robust design.



Credit(s)



Share this article:
Share via emailShare via LinkedInPrint this page

Further reading:

Electrical fire safety in lithium-ion battery rooms
Circuit & System Protection
Pratliperl is a non-combustible, ultra-lightweight aggregate that can be mixed with cement and applied as a plaster or screed to walls, floors, and ceilings.

Read more...
RF agile transceiver
Altron Arrow Telecoms, Datacoms, Wireless, IoT
The AD9361 is a high performance, highly integrated RF Agile Transceiver designed for use in 3G and 4G base station applications.

Read more...
Clearing the Static: ESD training in the workplace
Actum Circuit & System Protection
To protect sensitive electronic components, A structured, consistent, and sustainable ESD training program is essential.

Read more...
Protect your pumps – protect your profit
NewElec Pretoria Circuit & System Protection
In South Africa’s demanding agricultural landscape, irrigation is not just an essential service – it is the heartbeat of farm productivity.

Read more...
SmartRAID 4300 Series
Altron Arrow DSP, Micros & Memory
Microchip’s disaggregated architecture leverages host CPU and PCIe infrastructure to overcome traditional storage bottlenecks in scalable, secure NVMe RAID storage solutions.

Read more...
The evolution of 4D imaging radar
Altron Arrow Telecoms, Datacoms, Wireless, IoT
4D imaging radar is redefining automotive sensing with unmatched precision, scalability and resilience and, as global adoption accelerates, this technology is poised to become a cornerstone of autonomous mobility.

Read more...
Bluetooth wireless SoC
Altron Arrow Telecoms, Datacoms, Wireless, IoT
he EFR32BG29 wireless SoC from Silicon Labs is a highly efficient, high memory, low-power, and ultra compact SoC designed for secure and high-performance wireless networking for IoT devices.

Read more...
Wi-Fi 6 and Bluetooth LE co-processor
Altron Arrow Telecoms, Datacoms, Wireless, IoT
STMicroelectronics has released its ST67W611M1, a low-power Wi-Fi 6 and Bluetooth LE combo co-processor module.

Read more...
Empowering innovation with ST’s AI processors
Altron Arrow AI & ML
Artificial intelligence is no longer just a futuristic concept – it is here, and it is transforming industries at an unprecedented pace.

Read more...
1-Wire EEPROM with secure authenticator
Altron Arrow DSP, Micros & Memory
The DS28E54 secure authenticator combines FIPS 202-compliant secure hash algorithm (SHA-3) challenge and response authentication with secured electrically erasable programmable read-only memory.

Read more...









While every effort has been made to ensure the accuracy of the information contained herein, the publisher and its agents cannot be held responsible for any errors contained, or any loss incurred as a result. Articles published do not necessarily reflect the views of the publishers. The editor reserves the right to alter or cut copy. Articles submitted are deemed to have been cleared for publication. Advertisements and company contact details are published as provided by the advertiser. Technews Publishing (Pty) Ltd cannot be held responsible for the accuracy or veracity of supplied material.




© Technews Publishing (Pty) Ltd | All Rights Reserved