Mentor Graphics has made available an open-source SystemVerilog solution for users adopting the open verification methodology (OVM). The solution enables the easy and flexible re-use of legacy verification methodology manual (VMM) code within an OVM environment.
In addition to allowing VMM-based verification components to be re-used within an OVM environment, entire VMM environments can be re-used without modification within an OVM environment through the use of a new OVM/VMM interoperability library that provides the data and semantic conversions between the old and new environments. VMM sequential stimuli can be re-used as well, and integrated with OVM’s sequences, thus preserving and enhancing existing stimulus generation capabilities.
As an active member of the Accellera VIP technical subcommittee (TSC), Mentor has worked with other committee members to define the requirements for interoperability among different verification methodologies. Mentor’s solution conforms to the Accellera VIP-TSC’s set of requirements for SystemVerilog base class library interoperability that was approved by a technical subcommittee vote last December.
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