DSP, Micros & Memory


SRAMs on 65 nm process

24 June 2009 DSP, Micros & Memory

Cypress Semiconductor has developed a range of quad data rate (QDR) and double data rate (DDR) SRAM devices on 65 nm linewidth. The new SRAMs feature a clock speed of 550 MHz and a total data rate of 80 Gbps in a 36-bit I/O width QDRII device, using half the power of 90 nm SRAMs. They are ideally suited for networking applications, including Internet core and edge routers, fixed and modular Ethernet switches, 3G base stations and secure routers, and also enhance the performance of medical imaging and military signal processing systems. Compared with their 90 nm predecessors, the 65 nm SRAMs lower input and output capacitance by 60%. They have on-die termination (ODT), which improves signal integrity, reduces system cost and saves board space by eliminating external termination resistors. The 65 nm devices use a phase locked loop instead of a delay locked loop, which enables a 35% wider data valid window.



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