Altera has announced the availability of the Stratix IV GX FPGA development kit. The kit features hardware and software solutions for the rapid creation of designs using Altera's Stratix IV GX FPGAs with integrated 8,5 Gbps transceivers. The development kit provides an ideal environment for designing and testing high-speed serial interfaces, such as PCI Express (PCIe) Gen2, with up to x8-lane configurations.
The development kit offers a complete PCIe Gen2 end-point hardware design package, featuring a PCI-SIG-compliant board and two PCIe Gen2 hard intellectual property (IP) cores in the Stratix IV GX FPGA. A PCIe high-performance reference design that demonstrates both the software and hardware elements of a PCIe system is available for download on the Altera website. The two elements of this reference design communicate with drivers created using Jungo's PCIe WinDriver tool, forming a fully functional PCIe system. Several other popular protocols are supported by the development kit through the use of high-speed mezzanine cards available from Altera partners, including 10 Gigabit Ethernet (10 GbE), CPRI, OBSAI, SAS/SATA and Serial RapidIO (SRIO).
The development kit provides customers with Stratix IV GX innovations, including 36 full-duplex transceivers (24 of which operate at up to 8,5 Gbps), two PCIe hard IP blocks, 230 K logic elements and 13,9 Mbits of embedded memory. The development kit features a GX EP4SGX230 FPGA-based development board, a one-year licence of Quartus II Software, Development Kit Edition and access to Altera's MegaCore IP library including the Nios II Embedded Design Suite.
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