Analog frequency synthesis has until now been the only viable approach to low-jitter, low-phase-noise solutions - but with it comes all of the attendant problems of analog such as drift, ageing, temperature sensitivity, component tolerance, long settling time, etc.
According to Analog Devices, with the advent of high resolution DDS (direct digital synthesis) solutions, such as its AD9857, the advantages of digital synthesis - stability, repeatability, near instantaneous settling, programmability - are available to low-jitter and phase noise RF designs. The AD9857 is a 14 bit, 200 MSPS digital modulator with superior SFDR, jitter and phase noise performance, and can be used as a DDS frequency source.
The AD9857 is designed to suit applications that involve data upconversion and digital modulation. Its performance strengths are achieved through leading-edge 14 bit architecture, including a high capability 14 bit output DAC.
Although designed as a digital modulator with on-board DDS, Analog Devices says the AD9857 also features a single-tone mode of operation that allows the part to be used anywhere that an ordinary DDS would be appropriate. The chip can be particularly useful for single-tone applications that require excellent SFDR performance, low phase noise, low jitter and frequency agility.
The AD9857 can be operated at up to 200 MSPS, which allows carrier frequency outputs up to 80 MHz with a typical SFDR of 86 dBc at 10 kHz, or 85 dBc at 1 MHz. At a carrier frequency of 10 MHz, the AD9857 offers SFDR performance as high as 94 dBc at 10 kHz. It is capable of 145 dBc/Hz residual phase noise performance when the internal reference clock multiplier is bypassed, and is degraded slightly if the reference clock multiplier is used. The phase noise and jitter performance is essentially determined by the quality of the external reference clock, which is a fixed frequency source that can be highly optimised. (ADI says a jitter of under 1 ps should be attainable.) The tuning resolution of the AD9857 is determined by its 32 bit FTW. This gives a frequency step size of about 0,047 Hz with a system clock rate of 200 MHz.
Obtaining higher frequencies
The AD9857 digital modulator has a maximum sample rate of 200 MSPS. This means that generated output frequencies must be chosen to lie within the Nyquist bandwidth, or no more than one-half the sample rate. In practice, because alias filters are not perfectly rectangular, the maximum usable frequency is more like 40% of the sample rate, or 80 MHz for the AD9857, often a higher output frequency than this is desired. The output of the AD9857 could be heterodyned up to the desired frequency by employing a mixer/ local oscillator/filter combination. In some cases, however, a frequency of operation above the Nyquist band-width can be easily achieved by selecting and filtering images of the fundamental output from the AD9857. This technique makes use of the spectral characteristics of a sampled data system, as shown in Figure 1.
In general, images exhibit significantly poorer noise characteristics than does the fundamental. However, due to the excellent linearity of the AD9857's 14 bit DAC, the first or second image may still meet the system SNR requirements. To use an image, an appropriate sample frequency and fundamental output frequency to create an image at the desired frequency. Then the output from the AD9857 is bandpass filtered to select the desired image. Note that if an odd numbered image is used, any modulation spectrum is inverted with respect to the fundamental output. This can be compensated for by selecting the spectral invert bit in the AD9857. Figure 2 shows the first image of a GMSK modulated signal produced by the AD9857.
The sample rate is 195 MHz and the fundamental carrier is at 25 MHz. The first image at 170 MHz was selected. As can be seen from the superimposed GSM mask, this signal easily meets the GSM requirements.
For further information contact Ben van der Schyff, Parsec Components, (012) 349 2282, [email protected]
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