Silicon Laboratories has expanded its Any-Rate Precision Clock family with the Si5324, a low-jitter, highly integrated clock IC optimised for professional broadcast video applications. It replaces traditional multicomponent video PLL solutions with a single clock IC and can generate virtually any output frequency from 2 kHz to 1,4 GHz from any input frequency ranging from 2 kHz to 710 MHz, simplifying synchronisation in multirate video equipment. This makes the device well suited for video capture, conversion, editing, display and distribution equipment that must be synchronised within video studios.
Clock generation and synchronisation are becoming increasingly complex in broadcast video applications. The process, known as genlock, of synchronising all video equipment to a common sync source has become challenging due to the proliferation in the number of HD video formats and frame rates that must be supported. Additionally, the industry’s migration to high-speed 3G-SDI requires improved jitter performance in comparison to legacy video standards, increasing the design challenge for equipment makers. Traditional genlock solutions require discrete VCXO and filter components, support a limited range of input/output frequencies and suffer from relatively poor jitter performance in comparison to 3G-SDI requirements.
The Si5324 addresses these challenges, delivering jitter performance of 5 ps peak-to-peak, providing significant margin to existing and emerging video standards including 3G-SDI (SMPTE 424M). By meeting these standards with considerable margin, the jitter budget that would otherwise be allocated to clock generation can be applied to other components in the system, simplifying component selection and design.
The IC incorporates all PLL components into a single device, eliminating the need for multiple PLL ICs, external filters and VCXO components. Based on Silicon Labs’ patented DSPLL technology, the Si5324 has a fully integrated, digitally programmable loop filter that supports loop bandwidths ranging from 4 to 525 Hz, as well as a low phase noise internal VCO. The DSPLL technology enables the device to provide jitter filtering while also eliminating sensitive noise entry points between loop filter and VCXO components. Any-rate capability makes it possible for the Si5324 to generate and synchronise all common HD video and audio reference frequencies without any component changes, allowing one design for multiple applications and simplifying design re-use.
For more information contact Gary de Klerk, NuVision Electronics, +27 (0)11 894 8214, [email protected], www.nuvisionelec.co.za
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