One of the most critical and fundamental components of any digital computing system is the good old flip-flop. By virtue of having two stable states, these devices are usually used to store a single bit in memories, typically the result of a computation performed by a digital circuit. Consequently, the responsibility for maintaining the reliability of the digital computing device as well as determining the speed of computations falls squarely on the indispensable flip-flop. Despite being such a vital component, flip-flop circuits have hardly advanced much in recent times.
Researchers from the University of Michigan have now attempted to address the above issue, and have developed a novel flip-flop circuit with higher speeds and better reliability. The unique value proposition of this novel development mainly lies in the fact that the researchers have implemented an edge-triggered flip-flop circuit using negative differential resistance (NDR) diodes. This aspect draws its significance from the fact that an edge-triggered flip-flop circuit reflects its output in the form of a low-to-high or high-to-low transition of a clocking signal. The researchers’ key contribution, therefore, has been to exploit NDR diodes, which are well known for their high switching speeds (on the order of picoseconds)S to facilitate rapid transitions of the clocking signals.
The NDR-based flip-flop designed by the researchers primarily involves an input section with a transistor, which determines the logic function of the flip-flop and acts as the first stage of latching, as it receives the logic control signals and the clock signal. The researchers have envisioned two different embodiments for the design of the latch circuit section and the output circuit section, based on various configurations of connections using the NDR diode, which forms the core part of the design. Overall, such an implementation of an edge-triggered flip-flop circuit using NDR diodes is quite rare, and the ability of this design to offer high reliability and high switching speeds is therefore quite remarkable.
The innovative flip-flop design is likely to be found beneficial by integrated circuit (IC) manufacturers, particularly since it offers significant benefits despite being quite compact. The design especially stands out for its ability to approximate the ideal behaviour of a flip-flop circuit by reducing latency delays and the area overhead on the IC surface area. The flip-flop design has been granted a patent by the US Patents and Trademarks Office and has been made available for licensing.
For more information contact Patrick Cairns, Frost & Sullivan, +27 (0)18 464 2402, [email protected], www.frost.com
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