Programmable Logic


IGLOO FPGAs breed second generation

10 July 2013 Programmable Logic

Microsemi has released its new IGLOO2 field programmable gate array (FPGA) family for industrial, commercial aviation, defence, communications and security applications.

The non-volatile, Flash-based devices boast a powerful combination of mainstream FPGA features including general purpose input/outputs (GPIOs), 5G SERDES interfaces and PCI Express endpoints, in addition to what the manufacturer claims is the industry’s only high-performance memory subsystem.

The new FPGAs address industry needs for mainstream FPGA features by providing a LUT-based fabric, 5G transceivers, high-speed GPIO, block RAM and DSP blocks in a differentiated, cost- and power-optimised architecture. The architecture offers up to five times more logic density and three times more fabric performance than the previous-generation IGLOO family.

For cost-optimised FPGAs below 150K logic elements, IGLOO2 provides a high level of I/O and SERDES integration – which is necessary for I/O expansion, bridging, system management and co-processing – allowing customers to use smaller devices for I/O expansion and bridging solutions. This, coupled with the need for only two power supplies and no external configuration devices, reduces overall system cost and board complexity.

IGLOO2’s FPGA features are complemented by a unique, built-in, high-performance memory subsystem (HPMS) that embeds common user functions such as the industry’s largest monolithic embedded SRAM memory blocks. These memories provide fast, predictable low latency to time critical embedded applications such as video, embedded graphics functions and real-time Ethernet.

Included in the HPMS is up to 512 KB of Flash memory which allows users to store pertinent system data such as Ethernet MAC IDs, user keys, system configuration and system personalisation data. This feature also enables secure boot functions for industry leading processors by storing secondary boot loaders securely on chip.

In addition, the HPMS integrates two DMA controllers and a two-port memory cache (DDR bridges) to efficiently move data within and in-and-out of IGLOO2 to external DDR3 memories for these embedded time-critical applications.

The IGLOO2 FPGA family claims to deliver the industry’s lowest static power consumption by utilising a unique Flash*Freeze real-time power management mode.

To protect valuable customer IP, the family includes built-in design security for all devices including root-of-trust applications. Additionally, they feature SEU immunity due to the inherently reliable Flash-based FPGA fabric, ideal for safety critical, mission critical and high temperature systems.



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