To enable broadcasting, monitoring and exchanging content over the Internet, client access devices now require microcontroller functionality to handle network management, protocol and signalling, as well as digital signal processing functionality to manage audio, voice, data and fax signal processing.
A hybrid controller family that can assist embedded systems design engineers in meeting the challenges of delivering the Internet experience in both residential and commercial environments is now being offered by Motorola.
Historically, design engineers have addressed the challenges of adding control functions and processing power to systems by dividing the system tasks between multiple chips or even multiple-core solutions. Motorola was the first semiconductor manufacturer to integrate into a single core the performance of a traditional DSP with the control functionality of an MCU. This was its 56800 family. Today, Motorola offers a series of devices based on the 56800E core, that offers up to 120 MIPS of processing power, low power consumption, simplified programmability and enhanced compiler efficiency.
The company says the 56800E devices are suited for applications including packet telephony, feature phones with voice recognition, Internet telephony, integrated Internet access devices, as well as home automation systems such as security, lighting and HVAC. When used in conjunction with Motorola's 32 bit integrated microprocessors or microcontrollers, the 56800E devices effectively address SOHO and home networking equipment such as NICs, routers, bridges, hubs and residential gateways.
The 5685x family
The 56800E core was designed utilising Motorola's System-On-Chip (SoC) methodology. The company now makes available the new 56852, 56853, 56854, 56855, 56857 and 56858 MCU/DSP hybrid devices, which give embedded system designers a broad range of on-chip features providing flexibility for meeting varied price/performance requirements.
Features of the new 56800E-based DSP controllers include: hybrid DSP/MCU architecture delivering 120 MIPs at 120 MHz; 12 KB to 80 KB of program memory; 8 KB to 48 KB of data memory; external memory interface up to 6 MB; six channels of direct memory access; time-of-day functionality; COP/Watchdog timer; general-purpose 16 bit timers with digital-to-analog conversion functionality; synchronous serial interface with network and surround sound features; synchronous and asynchronous communications interface; serial and parallel host communications; fast interrupt capability; JTAG/Enhanced OnCE port for realtime, unobtrusive debugging; programmable general purpose input/output line.
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