Design Automation


Handel-C-language methodology benefits FPGA applications designers

8 May 2002 Design Automation

Celoxica, of Abingdon, UK, and programmable logic solutions supplier, Actel, have announced that Celoxica's new DK1.1 design suite supports Actel's FPGAs. DK1.1 will provide Actel users with a high-level methodology for rapidly designing and implementing complex algorithms in hardware.

DK1.1 provides technology mapping of Handel-C designs to architecture-specific resources in Actel's antifuse-based eX, SX, SX-A and RTSX-S devices and flash-based ProASIC and ProASICPLUS solutions. In addition to advanced synthesis and timing estimation tools, the area and delay analysis capabilities of DK1.1 will provide an early estimation of time and area before place and route for fast optimisation.



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