Vitis unified software platform provides a wide range of debugging solutions for FPGA, MPSoC, and ACAP designs. The software platform allows users to choose the right debug methodology to increase visibility while reducing debug and validation time. The webinar will provide a better understanding of debug capabilities, how they can be used and in which context.
In this webinar, a variety of debug modes will be introduced including:
• Software debug with system debugger, GNU debugger, and TCL scripts.
• Cross trigger debug with Vitis tools and third-party debug IDEs.
• Application-level debug between host and kernel code.
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