Accurate power estimation
31 Jul 2025
Design Automation
AMD Power Design Manager 2025.1 is now available – with support for AMD Versal AI Edge and Prime Series Gen 2 SoCs and production support for AMD Spartan UltraScale+ devices.
Power estimation is critical for many decisions during the adaptive SoC and FPGA design process. For many years, Xilinx Power Estimator (XPE) has been a leading FPGA power estimation tool. As adaptive SoCs and FPGAs increase in size and complexity, power estimation capabilities must scale accordingly, especially as designs include increasing numbers of new, complex, hard IP blocks.
Power Design Manager (PDM) is the next-generation power estimation platform designed to bring accurate and consistent power estimation capabilities to AMD Versal and UltraScale+ devices and Kria SOMs. PDM is the preferred power estimation tool for AMD adaptive SoCs and FPGAs, and AMD strongly recommends all Versal and UltraScale+ designs use PDM going forward.
This update can be downloaded from http://bit.ly/3UfMbPq
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