As AI workloads continue to scale, data centre architects are increasingly constrained by limited signal reach and rising latency, which can leave valuable memory resources underutilised across large GPU clusters. These challenges are amplified as interconnect speeds increase. At 64 GT/s (giga transfers per second), signal integrity limitations can restrict system scale and burden server architectures. In response, Microchip Technology has released XpressConnect PCIe 6.0 and CXL 3.1 retimers to enable memory expansion and resource disaggregation in large-scale AI fabrics.
The retimers are designed to extend signal reach beyond conventional PCIe Gen 5 and Gen 6 electrical limits, enabling more flexible system designs across complex baseboards, riser cards and cabled interconnects. The retimers are engineered to help address these challenges by enabling higher-bandwidth connectivity, while supporting the stringent thermal and power budgets required in modern AI fabrics. XpressConnect retimers achieve a pin-to-pin latency of less than 12 ns, approximately 80% lower than PCIe 6.0 specifications. This low-latency performance helps improve utilisation of AI accelerators and GPUs by reducing data stalls in high-density AI clusters.
The XpressConnect retimers are engineered to work alongside the company’s 3-nm Switchtec PCIe Gen 6 switches, Adaptec SmartRAID controllers and Host Bus Adapters (HBAs), and Flashtec NVMe controllers.
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