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Xilinx all programmable RFSoCs
15 November 2017, Electronics Technology

Xilinx announced delivery of its Zynq UltraScale+ RFSoC family, an architecture integrating the RF signal chain into a system-on-chip (SoC) for 5G wireless, cable Remote-PHY and radar. Based on 16 nm UltraScale+ MPSoC architecture, the chips monolithically integrate RF data converters for up to 50% to 75% system power and footprint reduction, and soft-decision forward error correction (SD-FEC) cores to meet 5G and DOCSIS 3.1 standards. With silicon samples already shipping to multiple customers, the early access programme for the family is now available.

Devices in the family feature eight 4 GSps or sixteen 2 GSps 12-bit ADCs; eight to sixteen 6,4 GSps 14-bit DACs; integrated SD-FEC cores with LDPC and Turbo codecs for 5G and DOCSIS 3.1; ARM processing subsystem with quad-core Cortex-A53 and dual-core Cortex-R5s; 16 nm UltraScale+ programmable logic with integrated Nx100G cores; and up to 930 000 logic cells and over 4200 DSP slices.

For more information contact Erich Nast, Avnet South Africa, +27 (0)11 319 8600, Xilinx all programmable RFSoCs, erich.nast@avnet.com


Credit(s)
Supplied By: Avnet South Africa
Tel: +27 11 319 8600
Fax: +27 11 319 8650
Email: sales@avnet.co.za
www: www.avnet.co.za
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Further reading:

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