The STM32WB15CC multiprotocol wireless microcontroller (MCU) embeds a powerful and ultra-low-power radio compliant with the Bluetooth Low Energy SIG specification 5.2. It contains a dedicated Arm Cortex-M0+ core for performing all the real-time, low-layer operations.
The device is designed to be extremely low-power and is based on the high-performance Arm Cortex-M4 32-bit RISC core operating at a frequency of up to 64 MHz. This core features a floating point unit (FPU) that supports all Arm single-precision data processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) that enhances application security. Enhanced inter-processor communication is provided by the IPCC with six bidirectional channels. The HSEM provides hardware semaphores used to share common resources between the two processors.
Embedded in the chip are high-speed memories (320 KB of Flash memory and 48 KB of SRAM) and an extensive range of enhanced I/Os and peripherals. Direct data transfer between memory and peripherals and from memory to memory is supported by seven DMA channels with fully flexible channel mapping by the DMAMUX peripheral.
The device features several mechanisms for embedded Flash memory and SRAM: readout protection, write protection and proprietary code readout protection. Portions of the memory can be secured for Cortex -M0+ exclusive access. The AES encryption engine, PKA and RNG enable upper-layer cryptography.
The device offers a fast 12-bit ADC and one ultra-low-power comparator, a low-power RTC, one advanced 16-bit timer, one general-purpose 32-bit timer and two 16-bit low-power timers. In addition, up to eight capacitive sensing channels are available.
The STM32WB15CC also features standard and advanced communication interfaces, namely one USART (ISO 7816, IrDA, Modbus and Smartcard mode), one low-power UART (LPUART), one I2C (SMBus/PMBus) and one SPI up to 32 MHz.
Operating across the -40°C to +85°C temperature range, the chip runs off a 1,71 to 3,6 V power supply, with a comprehensive set of power-saving modes enabling the design of low-power applications. It integrates a high-efficiency SMPS step-down converter with automatic bypass mode capability when VDD falls below a certain voltage level (default is 2,0 V). It includes independent power supplies for analog input to the ADC and comparator.
A VBAT dedicated supply allows the device to back up the LSE 32,768 kHz oscillator, the RTC and the backup registers, thus enabling the STM32WB15CC to supply these functions even if the main VDD is not present through a CR2032-like battery, a supercapacitor or a small rechargeable battery.
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