Analog Devices unveiled a rapid prototyping kit that simplifies wide-dynamic-range GSps data converter-to-FPGA connectivity.
Digital and analog designers can use the AD-FMCDAQ2-EBZ to quickly prototype the high-speed JEDEC JESD204B SerDes interface on major FPGA platforms, including Xilinx’s UltraScale FPGA and Zynq All Programmable SoC devices for radar, instrumentation, wireless radio and other data acquisition applications.
The system is packaged in an FMC form factor for verifying hardware and processing algorithms and rapidly moving from prototype to production in order to reduce the time and risk associated with designing wideband RF signal processing systems. Its performance, bandwidth and integrated functionality allow designers to achieve better signal acquisition in congested RF environments over a very wide bandwidth.
The AD-FMCDAQ2-EBZ provides tested reference designs including ultra-high-speed data converters, driver amplifiers, clocks and power management ICs. Also included are HDL (hardware description language) code, device drivers, an eye analyser tool and online support at Analog Devices’ EngineerZone online technical support community.
The kit includes an onboard AD9680 dual-channel, 14-bit, 1 GSps analog-to-digital converter (ADC). When converting a 1 GHz input, the ADC achieves spurious-free dynamic range (SFDR) performance of 80 dBc and 61,4 dBFS signal-to-noise ratio (SNR) while consuming 1,65 W of total power per channel.
The digital-to-analog converter (DAC) in the kit is the 4-channel, 16-bit AD9144, of which two channels are accessed on the board. It features 82 dBc SFDR and a maximum sample rate of 2,8 GSps, permitting multicarrier generation up to the Nyquist frequency.
The AD9523-1 low-jitter clock generator provides a low-power, multi-output clock distribution function with low jitter performance, along with an on-chip PLL and VCO with two VCO dividers.
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