DSP, Micros & Memory


A scalable platform for automotive instrument cluster design

22 March 2017 DSP, Micros & Memory

In any vehicle, the dashboard instrument cluster is the driver’s primary source of information about the vehicle’s status. Consumers are increasingly demanding the kind of digital experience in driving that they find in their home entertainment systems and carry with them in their mobile devices.

In response to this changing environment, automotive manufacturers are moving beyond traditional analog gauges toward information-rich graphical displays. As part of that evolution, instrument clusters are evolving rapidly with the addition of colour 2D and 3D graphics intended to safely provide drivers with information drawn from more sources of digital data. These dashboards range from designs with more limited functionality in economy trims or vehicle lines to those offering highly advanced customisable displays in luxury offerings (Figure 1).

Figure 1. Automotive manufacturers are turning to customisable instrument clusters that use 2D and 3D graphics to safely present drivers with increasingly more information.(Image source: Wikimedia Commons/Robert Basic).
Figure 1. Automotive manufacturers are turning to customisable instrument clusters that use 2D and 3D graphics to safely present drivers with increasingly more information.(Image source: Wikimedia Commons/Robert Basic).

Highly integrated system-on-chip (SoC) devices, such as NXP Semiconductors’ i.MX6 application processors, offer an effective approach for creating scalable platforms for complex graphics-intensive automotive applications such as instrument clusters. The combination of these SoCs with memory, communications and other peripherals needed in these applications imposes significant requirements for ensuring proper voltage, current and power sequencing. For designers, the combination of these automotive SoCs with specialised power management SoCs can significantly simplify the design of platforms able to scale from simple instrument clusters for economy cars all the way to high-performance reconfigurable 3D systems for luxury vehicles.

Scalable platform

Designs for sophisticated instrument clusters present developers with significant challenges for delivering graphics systems able to present complex, fast-changing information in real time. To balance basic system requirements with those for advanced graphics performance, automotive designers should consider augmenting more familiar MCU-based designs with specialised SoCs able to accelerate execution of graphics and high-level applications code (Figure 2).

Figure 2. To meet demand for high-performance 2D and 3D graphics, conventional microcontroller-based designs are augmented with specialised SoCs to speed processing of application code and graphics operations. (Image source: NXP Semiconductors).
Figure 2. To meet demand for high-performance 2D and 3D graphics, conventional microcontroller-based designs are augmented with specialised SoCs to speed processing of application code and graphics operations. (Image source: NXP Semiconductors).

NXP’s i.MX6 series of applications SoCs offers a particularly effective solution for automotive instrument cluster designs. Developers can, for the most part, scale an existing i.MX6-based instrument cluster design by dropping in an i.MX6 family member that best matches application requirements for cost and performance. In fact, the i.MX 6 series is intended to serve as a scalable platform.

For demanding reconfigurable 3D instrument clusters, the i.MX6DualPlus and i.MX6QuadPlus families offer dual-core and quad-core performance, respectively. These devices include LVDS, MIPI display port, MIPI camera port and HDMI v1.4 interfaces. For less demanding applications, devices such as the i.MX6Solo offer a lower-cost option that nevertheless combines a single ARM Cortex-A9 core, graphics acceleration, and LP-DDR2 memory interface with a full slate of connectivity options.

Graphics acceleration

Members of the NXP i.MX6 series integrate dedicated GPUs designed to accelerate 2D and 3D graphics. For example, the built-in GPU3D core provides a complete high-performance graphics processing pipeline able to accelerate shading, texturing and rendering of 3D graphics used in a growing array of consumer applications including automotive instrument cluster displays and heads-up displays (Figure 3). Different members of the i.MX6 series offer different levels of depth in the graphics pipeline, scaling to lower-performance capabilities for lower-cost devices.

Figure 3. In high-performance members of the NXP i.MX6 family, integrated 2D and 3D graphics-processing units (GPU) use pipeline processing to accelerate graphics operations.(Image source: NXP Semiconductors).
Figure 3. In high-performance members of the NXP i.MX6 family, integrated 2D and 3D graphics-processing units (GPU) use pipeline processing to accelerate graphics operations.(Image source: NXP Semiconductors).

Regardless of the underlying processor, developers can take advantage of available accelerated imaging resources through a number of industry-standard graphics APIs including OpenGL for embedded systems (OpenGL ES), which is able to take advantage of the i.MX6 GPUs to accelerate 3D graphics. Similarly, the i.MX6 integrated R2D GPU is designed to accelerate OpenVG 2D vector graphics used in graphical user interfaces (GUI) and menu displays.

Design environments such as those from NXP or third parties leverage these APIs to simplify software development of instrument cluster applications. In fact, developers can find software libraries and code that takes full advantage of hardware-accelerated graphics in a way that is transparent to the software engineer.

Complex power requirements

Highly integrated devices such as i.MX6 automotive SoCs help developers meet diverse requirements for scalable instrument cluster designs. Yet, in integrating so much function-ality in a single device, these complex devices can present significant power requirements.

In a dashboard graphics system, developers might need to combine a high-performance i.MX6Dual or i.MX6Q quad processor with multiple interfaces and subsystems. These include memory, wireless connectivity, Bluetooth, GPS, audio amplifier, various sensors, camera input, and multiple communication interfaces such as USB, HDMI, SATA, LVDS and mPCIe. Each circuit, supporting module, and peripheral within the SoC-based system needs power at specific voltage and current levels.

Furthermore, each power rail running through this complex system needs to be powered up/down in specific sequences to ensure proper system boot and proper activation of circuits and modules. As a result, each device and power rail must be monitored for faults during initialisation as well as during normal operation.

For these complex SoC-based systems, power management based on conventional discrete power devices is impractical at best. With the addition of large numbers of external components, discrete power solutions can be bulky and unreliable according to classical parts-count reliability criteria. Because a typical SoC-based automotive dashboard design could require a half dozen LDOs and the same number of DC-DC converters, vehicle product engineers would find themselves forced to squeeze bulky power packages into dashboard designs.

In contrast, a power management SoC such as the NXP MMPF0100, which offers up to six DC-DC converters and six LDOs, enables developers to reduce the size of the BOM, and of the final design itself. In terms of space savings alone, a MMPF0100 design could fit in about 350 mm² versus about 800 mm² for an equivalent discrete solution.

Intended to complement the i.MX6 SoC, the MMPF0100 is designed to supply multiple power rails – initialised in the required sequence – for a complete system including i.MX6 SoCs, memory and system peripherals.

With the MMPF0100, four to six independent buck regulator outputs can be configured. This flexibility allows regulator outputs to operate with higher current capability or as independent outputs for applications that require lower current but more voltage rails. The device’s buck regulators can meet supply requirements for the i.MX6 processor cores as well as other low voltage circuits such as I/O and memory. Furthermore, built-in dynamic voltage scaling provides controlled supply rail adjustments for the processor cores and other circuitry.

Conclusion

By integrating ARM Cortex-A9 cores with dedicated GPUs, the NXP i.MX6 series of automotive application SoCs addresses a growing need for high-performance solutions for graphics-intensive instrument cluster designs. At the same time, these designs present increasingly complex power requirements that limit the effectiveness of conventional discrete power solutions. By combining an i.MX6 SoC with the NXP MMPF0100 power management SoC, developers can rapidly create a highly effective platform for automotive instrument clusters.

For more information contact NuVision Electronics, +27 (0)11 608 0144, gdeklerk@nuvisionelec.co.za, www.nuvisionelec.com



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