16 July 2003Programmable Logic
Security Services & Risk Management
Actel has announced production qualification of its AX1000, AX500, AX250 and AX125 field-programmable gate arrays (FPGAs), the first four members of the company's high-performance Axcelerator family. Built upon the company's AX architecture, Actel says the family delivers better than 500 MHz internal operation and up to 100 % resource utilisation. Additionally, 'live at power-up' Axcelerator FPGAs avoid in-rush current spikes, simplify system power supply design and generally enable Actel to offer lower standby and dynamic power consumption than other solutions.
According to Actel other benefits of Axcelerator FPGAs include immunity to firm errors and superior design security. "We have seen an overwhelming response to our Axcelerator family since its introduction, clear evidence of the advantages these FPGAs offer the marketplace," said Jon Ewald, director of product marketing at Actel. "With the qualification of the AX1000, AX500, AX250 and AX125 devices and the Axcelerator-optimised CorePCIX IP block, designers have access to industry-leading FPGA solutions that not only satisfy their performance and power requirements, but also deliver the additional benefits of unsurpassed design security and immunity to costly firm errors."
Firm errors occur when high-energy neutrons generated in the upper atmosphere strike the configuration cell of an SRAM FPGA. The energy of the collision can change the state of the configuration cell and thus change the logic and/or routing of the FPGA in an unpredictable and uncontrollable way. As a result, these errors are impossible to prevent when using SRAM FPGAs, costly to detect and could result in system failure. Because the configuration element of Axcelerator FPGAs, the antifuse, cannot be altered once programmed, firm errors are nonexistent.
For more information contact Kobus van Rooyen, ASIC Design Services, 011 315 8316, kobus@asic.co.za
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