Phase locked loop clock synthesizers
16 July 2003
DSP, Micros & Memory
ON Semiconductor's NBC12429FN, a 3,3/5,0 V programmable phase locked loop (PLL) clock synthesiser that provides a 25 to 400 MHz system clock, is suited for the primary timing signals in networking, telecoms and test hardware. This device is the first in a family of six PLL clock synthesisers the company is introducing. Each will be a drop-in replacement for devices being discontinued. The NBC12429FN uses an external oscillator to provide a reference signal that is then synthesised to produce the final clock. Using a 16 MHz external crystal oscillator with the device, for example, accommodates output clock signals in the range of 25 MHz to 400 MHz at 1 MHz steps - a highly flexible level of programmability. The integrated PLL provides programmable bandwidth to balance jitter filtration and lock time with only minimal frequency overshoot. Jitter is ±20 ps peak-to-peak. The device operates on both 3,3 V and a 5 V supply and come in 28-pin PLCC package.
Avnet Kopp, 011 809 6100
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