Design Automation


Co-verification tool using VxSim on Windows NT

25 October 2000 Design Automation

Innoveda has announced Windows NT-based software that couples VxSim, a host-compiled RTOS emulation tool from Wind River Systems, with Innoveda's V-CPU co-verification tool. The combination of V-CPU 'Implicit Access' technology for host-compiled programs with VxSim makes this solution unique and applicable for high-level firmware verification. It enables users to run all levels of system software including application code and software IP with a co-verification tool. This software now runs on Windows NT 4.0, HP-UX and Sun Solaris platforms.

V-CPU executing with VxSim enables embedded system designers to begin full system testing earlier in the design process and speeds product development. A licence for the V-CPU RTOS support package with VxSim is available immediately. A V-CPU licence also is required. A VxSim licence is available from Wind River.

"Innoveda and Wind River collaborated on the port in response to many software engineers who use Windows NT on their desktops," said Steven Anderson, Product Marketing Manager at Innoveda. "Embedded system software developers using V-CPU with VxSim on Windows NT can shave weeks or months off tight product development schedules. This new port brings the fastest software execution environment for RTOS code to the popular NT platform and provides links to hardware models for early system integration testing without requiring users to modify their code."

Productivity gains

Innoveda says that for software engineers, V-CPU coupled with VxSim provides early access to a virtual prototype of their target hardware, so they can run their embedded system software. It features a complete Wind River Tornado development environment on the host workstation and provides automated launching of the simulated target hardware. The tool enables high-speed software execution environment that can be linked to many popular processor models for system integration testing. Memory and register accesses to the simulated hardware require no changes to the source code. This integration allows software engineers to run all levels of their system software including software IP, hardware driver code and application code that rely on the underlying RTOS.

The V-CPU combined with VxSim for hardware engineers provides a complete hardware debug environment using existing Verilog and VHDL logic simulation tools. It enables true system simulation using stimulus from embedded system software instead of contrived testbenches. It also features record and playback of bus cycles for debug and regression testing and can be configured for any processor using bus functional models from such vendors as Motorola, ARM and QED. The integration of Bus Functional Models (BFMs) can be performed by the user or through off-the-shelf models provided by Innoveda. Innoveda also provides consulting services to do the BFM integrations.

Viewlogic is represented in South Africa by ASIC Design Services.



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