All integrated circuits have an input voltage limitation due to the manufacturing process. This limitation is cumbersome when trying to step down a high-supply voltage to a lower, regulated voltage using a DC/DC converter such as a linear regulator. Adding a FET to the input of a linear regulator creates a DC/DC converter with a wider input voltage range than the range of the regulator alone. The excess voltage (and therefore power) is dropped across the FET.
Figure 1 shows an IRF7601 N-channel MOSFET on the input of a TPS79228 2,8 V, 100 mA, low-noise, high-PSRR LDO regulator. The two resistors provide a bias voltage to the gate of the MOSFET and the load current determines the voltage at the source of the MOSFET (ie, the FETs on resistance adjusts to meet the load current). The MOSFET is selected based on three criteria: drain to source breakdown voltage, gate drive requirements, and power dissipation capabilities. In this example, the maximum power-supply voltage is 15 V, but the TPS79228 has a maximum recommended operating input voltage of 5,5 V, so a MOSFET with a 20 V breakdown voltage is selected.
To determine the minimum bias voltage for the gate of the MOSFET, the MOSFET's drain current (ID) vs gate-source voltage (VGS) data sheet curve is required. For the IRF7601, the curves indicate that the device needs VGS slightly below 1,5 V for a 100 mA output current. Since the maximum dropout of the regulator is 100 mV at 100 mA, the regulator's input voltage must stay above 2,9 V. Therefore, the gate of the MOSFET must be biased to at least 1,5 V + 2,9 V = 4,4 V, so that when the MOSFET is providing 100 mA, its source voltage does not drop below 2,9 V. The maximum gate bias voltage is simply the maximum recommended operating voltage for the regulator, or 5,5 V. This voltage provides more than enough gate drive to provide the regulator's 1 µA of quiescent current while in shutdown mode.
Although the gate can be biased between 4,4 V and 5,5 V, a bias voltage of 5,0 V is selected to account for variations in the threshold voltage. Maximum power dissipation for the FET is:
100 mA x (15 V - 2,9 V) = 1,21 W
which the IRF7601 in a Micro 8 package can handle for TA = 55°C.
So, a low noise, low ripple 2,8 V output voltage is generated from a 15 V supply using the TPS79228 and a MOSFET.
Figure 2 is slightly more complicated but may be necessary if the input voltage varies significantly. A Zener diode replaces the bottom resistor in Figure 1 and provides a fixed gate drive to the MOSFET. The output voltage of the Zener is selected in a manner similar to that explained previously.
Summary
Either method is acceptable for creating a DC/DC converter with a wider input voltage range than the converter IC allows. The single MOSFET solution is the simplest and cheapest solution. The MOSFET biased with a Zener diode is the best choice when the supply is unregulated.
© Technews Publishing (Pty) Ltd | All Rights Reserved
printer friendly version