DSP, Micros & Memory


Single-cycle 8051 core provides performance boost

20 April 2005 DSP, Micros & Memory

Atmel's new AT89LP family, based on a single-cycle 8051 core, is 12 times faster than the standard 8051 core, according to the company. These devices are optimised for applications that require low power consumption and at the same time high performance at low cost. A wide operating voltage range of 2,0 V to 5,5 V is offered to accommodate power management, white goods and battery-operated applications.

As the company explains, the AT89LP CPU requires only one clock cycle for every byte fetch, whereas the classic 8051 CPU requires 12 clock cycles for every byte fetch. The AT89LP core is capable of 20 MIPS throughput at 20 MHz clock frequency. In comparison, the classic 8051 architecture delivers less than 2 MIPS at 20 MHz. Conversely, at the same MIPS throughput as the classic 8051, the new AT89LP core runs at a much lower clock frequency, thereby reducing power consumption by 85%.

Binary compatibility with the standard 8051 instruction set allows designers to easily migrate from multiclock cycle 8051 devices to the AT89LP series, and so easily upgrade their application's performance without a costly and time-consuming redesign. The family of devices offers designers an opportunity to achieve higher speed, or significantly reduce power consumption while maintaining software and hardware compatibility. They can also help designers to solve EMC issues by reducing operating frequency.

The AT89LP family consists of devices with 2 to 64 Kbytes of ISP Flash memory, and is available in a variety of pin options, from 14, 20, 28 and 44. They include on-chip DataFlash, 10-bit ADC, analog comparator, pulse width modulators, programmable watchdog timer, enhanced UART, internal RC oscillator. Such functions are ideally suited for power management, motor control and industrial control applications.



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