The new LPC1300 microcontroller series from NXP Semiconductors employs the 32-bit ARM Cortex-M3 architecture and achieves performance of 70 MHz while consuming just 200 μA/MHz. This power-performance ratio makes them suitable for applications in battery-powered systems, e-metering, consumer peripherals and remote sensors.
The new MCUs feature a nested vector interrupt controller for fast deterministic interrupts, while the wakeup interrupt controller allows automatic wake. Three reduced-power modes – sleep, deep-sleep and deep power-down – are included to give designer flexibility of control over power consumption.
Communications peripherals include a USB 2.0 full-speed device controller with on-chip PHY, UART, SSP/SPI controller and I²C bus interface. Among the integrated I/O peripherals are 10-bit ADCs with eight channels and conversion rates up to 250 KSps, up to 42 GPIO pins and four general-purpose counter/timers. Also featured are a programmable watchdog timer with lock-out and a system tick timer.
Built around a Cortex-M3 Rev2 processor core, the LPC1300 is equipped with up to 32 KB of Flash and up to 8 KB of SRAM, uses a single 3,3 V power supply (for operation between 1,8 and 3,6 V), and is available in LQFP48 and HVQFN 33 packages. The LPC1300 series is pin-to-pin compatible with the LPC1100 series, NXP’s new family of Cortex-M0 MCUs, giving designers a migration path to the lower-power features of the Cortex-M0 architecture.
In keeping with NXP’s existing line of more than 50 USB-equipped ARM MCUs, the LPC134x offers support for USB full-speed operation. HID and mass storage USB driver software is included in a dedicated on-chip ROM, maximising the amount of Flash memory available for user code. Through third-party suppliers, a range of development and evaluation tools is also available.
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