Telecoms, Datacoms, Wireless, IoT


100 Mbps Ethernet controller

30 September 2009 Telecoms, Datacoms, Wireless, IoT

Microchip’s new ENC624J600 is a low-cost standalone IEEE 802.3 compliant 100 Mbps Ethernet interface controller. It combines a 10/100Base-TX physical interface (PHY) and a media access controller (MAC) with a hardware cryptographic security engine, and can connect to any PIC microcontroller (MCU) via an industry-standard serial peripheral interface (SPI) or a flexible parallel interface. Additionally, each device has a unique, factory programmed MAC address and 24 KB of configurable SRAM for packet transmit/receive buffering and data storage.

The configurable SRAM buffer memory provides a flexible, reliable data management system that enables an efficient method for packet storage, retrieval and modification, reducing the memory requirements for the host MCU. The ENC624J600 controllers also integrate hardware cryptographic security engines, which perform RSA, Diffie-Hellman, MD5 and SHA-1 algorithm computations in support of cryptographic protocols such as SSL/TLS, SSH and various VPNs. These integrated hardware features enable secure data transmissions with reduced code size, faster connection establishment and throughput, and reduced firmware development efforts.

Microchip offers a TCP/IP stack that can be used for free with any of its 8-, 16- or 32-bit PIC microcontrollers or dsPIC digital signal controllers. The stack includes SSL encryption and a TCP/IP configuration wizard to simplify the configuration of Ethernet projects. Additionally, the stack utilises the industry-standard SSLv3 protocol to secure any TCP connection, while building in support for the HTTP Web server and SMTP e-mail client modules.



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